even faster pio speed are possible

examples/rpi-pico-w/src/pio.rs

@@ -2,7 +2,7 @@ use core::slice;
 
 use cyw43::SpiBusCyw43;
 use embassy_rp::dma::Channel;
-use embassy_rp::gpio::{Pin, Pull};
+use embassy_rp::gpio::{Drive, Pin, Pull, SlewRate};
 use embassy_rp::pio::{PioStateMachine, ShiftDirection};
 use embassy_rp::relocate::RelocatedProgram;
 use embassy_rp::{pio_instr_util, Peripheral};
@@ -43,10 +43,11 @@ where
             "out pins, 1    side 0"
             "jmp x-- lp     side 1"
             "set pindirs, 0 side 0"
-            // "nop            side 1"
+            "nop            side 1"
             "lp2:"
-            "in pins, 1     side 0"
+            "in pins, 1     side 1"
-            "jmp y-- lp2    side 1"
+            "jmp y-- lp2    side 0"
+
             ".wrap"
         );
 
@@ -55,15 +56,22 @@ where
         let mut pin_io = sm.make_pio_pin(dio);
         pin_io.set_pull(Pull::Down);
         pin_io.set_schmitt(true);
-        let pin_clk = sm.make_pio_pin(clk);
+        pin_io.set_input_sync_bypass(true);
+
+        let mut pin_clk = sm.make_pio_pin(clk);
+        pin_clk.set_drive_strength(Drive::_12mA);
+        pin_clk.set_slew_rate(SlewRate::Fast);
 
         sm.write_instr(relocated.origin() as usize, relocated.code());
 
+        // 32 Mhz
+        sm.set_clkdiv(0x03E8);
+
         // 16 Mhz
-        sm.set_clkdiv(0x07d0);
+        // sm.set_clkdiv(0x07d0);
 
         // 8Mhz
-        sm.set_clkdiv(0x0a_00);
+        // sm.set_clkdiv(0x0a_00);
 
         // 1Mhz
         // sm.set_clkdiv(0x7d_00);

rust-toolchain.toml

@@ -1,7 +1,7 @@
 # Before upgrading check that everything is available on all tier1 targets here:
 # https://rust-lang.github.io/rustup-components-history
 [toolchain]
-channel = "nightly-2022-11-22"
+channel = "nightly-2023-03-19"
 components = [ "rust-src", "rustfmt" ]
 targets = [
     "thumbv6m-none-eabi",

src/bus.rs

@@ -4,6 +4,7 @@ use embassy_time::{Duration, Timer};
 use embedded_hal_1::digital::OutputPin;
 use embedded_hal_1::spi::ErrorType;
 use embedded_hal_async::spi::{transaction, SpiDevice};
+use futures::FutureExt;
 
 use crate::consts::*;
 
@@ -46,18 +47,40 @@ where
         self.pwr.set_high().unwrap();
         Timer::after(Duration::from_millis(250)).await;
 
-        while self.read32_swapped(REG_BUS_TEST_RO).await != FEEDBEAD {}
+        while self
+            .read32_swapped(REG_BUS_TEST_RO)
+            .inspect(|v| defmt::trace!("{:#x}", v))
+            .await
+            != FEEDBEAD
+        {}
 
         self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await;
-        let val = self.read32_swapped(REG_BUS_TEST_RW).await;
+        let val = self
+            .read32_swapped(REG_BUS_TEST_RW)
+            .inspect(|v| defmt::trace!("{:#x}", v))
+            .await;
         assert_eq!(val, TEST_PATTERN);
 
+        self.read32_swapped(REG_BUS_CTRL)
+            .inspect(|v| defmt::trace!("{:#010b}", (v & 0xff)))
+            .await;
+
         // 32-bit word length, little endian (which is the default endianess).
         self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await;
 
-        let val = self.read32(FUNC_BUS, REG_BUS_TEST_RO).await;
+        self.read8(FUNC_BUS, REG_BUS_CTRL)
+            .inspect(|v| defmt::trace!("{:#b}", v))
+            .await;
+
+        let val = self
+            .read32(FUNC_BUS, REG_BUS_TEST_RO)
+            .inspect(|v| defmt::trace!("{:#x}", v))
+            .await;
         assert_eq!(val, FEEDBEAD);
-        let val = self.read32(FUNC_BUS, REG_BUS_TEST_RW).await;
+        let val = self
+            .read32(FUNC_BUS, REG_BUS_TEST_RW)
+            .inspect(|v| defmt::trace!("{:#x}", v))
+            .await;
         assert_eq!(val, TEST_PATTERN);
     }