uarte: Only stop RX forcefully when a reception is running
The STOPRX task always triggers a timeout of ~55bit times until the RXTO event is generated. Before we disabled the receiver only after the timeout. With this change the receiver is stopped right after reception has ended because the DMA buffer is full. For forced RX aborts like `stop()` or on drop still need to wait for the RXTO event before disabling the receiver.
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@ -170,6 +170,13 @@ where
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trace!("endrx");
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let len = uarte.rxd.amount.read().bits();
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compiler_fence(Ordering::SeqCst);
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if uarte.events_rxstarted.read().bits() != 0 {
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// The ENDRX was signal triggered because DMA buffer is full.
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uarte.events_rxstarted.reset();
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try_disable = true;
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}
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T::state().rx_done.signal(len);
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}
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@ -227,6 +234,7 @@ impl<T: Instance> embassy::uart::Uart for Uarte<T> {
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// `mem::forget()` on a previous future after polling it once.
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assert!(!self.rx_started());
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T::state().rx_done.reset();
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self.enable();
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ReceiveFuture {
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@ -334,27 +342,28 @@ where
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fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
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let Self { uarte, buf } = unsafe { self.get_unchecked_mut() };
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if !uarte.rx_started() {
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let uarte = &uarte.instance;
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match T::state().rx_done.poll_wait(cx) {
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Poll::Pending if !uarte.rx_started() => {
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let uarte = &uarte.instance;
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T::state().rx_done.reset();
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let ptr = buf.as_ptr();
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let len = buf.len();
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assert!(len <= EASY_DMA_SIZE);
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let ptr = buf.as_ptr();
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let len = buf.len();
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assert!(len <= EASY_DMA_SIZE);
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compiler_fence(Ordering::SeqCst);
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uarte.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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uarte
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.rxd
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.maxcnt
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.write(|w| unsafe { w.maxcnt().bits(len as _) });
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compiler_fence(Ordering::SeqCst);
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uarte.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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uarte
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.rxd
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.maxcnt
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.write(|w| unsafe { w.maxcnt().bits(len as _) });
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trace!("startrx");
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uarte.tasks_startrx.write(|w| unsafe { w.bits(1) });
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trace!("startrx");
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uarte.tasks_startrx.write(|w| unsafe { w.bits(1) });
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Poll::Pending
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}
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Poll::Pending => Poll::Pending,
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Poll::Ready(_) => Poll::Ready(Ok(())),
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}
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T::state().rx_done.poll_wait(cx).map(|_| Ok(()))
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}
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}
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