Merge #1033
1033: stm32/usart: Add missing constructor with hardware flow control r=Dirbaio a=guillaume-michel This PR follows #1031 and #987 and add missing constructors with hardware flow control. It also factor general UART configuration like word size, parity, ... used in `Uart`, `UartRx`, `UartTx` and `BufferedUart`. Co-authored-by: Guillaume MICHEL <guillaume@squaremind.io>
This commit is contained in:
commit
a7d5c87049
@ -45,6 +45,51 @@ impl<'d, T: BasicInstance> Unpin for BufferedUart<'d, T> {}
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impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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pub fn new(
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pub fn new(
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state: &'d mut State<'d, T>,
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peri: impl Peripheral<P = T> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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tx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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config: Config,
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) -> BufferedUart<'d, T> {
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T::enable();
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T::reset();
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Self::new_inner(state, peri, rx, tx, irq, tx_buffer, rx_buffer, config)
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}
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pub fn new_with_rtscts(
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state: &'d mut State<'d, T>,
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peri: impl Peripheral<P = T> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
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cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
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tx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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config: Config,
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) -> BufferedUart<'d, T> {
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into_ref!(cts, rts);
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T::enable();
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T::reset();
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unsafe {
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rts.set_as_af(rts.af_num(), AFType::OutputPushPull);
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cts.set_as_af(cts.af_num(), AFType::Input);
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T::regs().cr3().write(|w| {
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w.set_rtse(true);
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w.set_ctse(true);
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});
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}
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Self::new_inner(state, peri, rx, tx, irq, tx_buffer, rx_buffer, config)
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}
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fn new_inner(
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state: &'d mut State<'d, T>,
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state: &'d mut State<'d, T>,
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_peri: impl Peripheral<P = T> + 'd,
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_peri: impl Peripheral<P = T> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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@ -56,34 +101,17 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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) -> BufferedUart<'d, T> {
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) -> BufferedUart<'d, T> {
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into_ref!(_peri, rx, tx, irq);
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into_ref!(_peri, rx, tx, irq);
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T::enable();
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T::reset();
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let r = T::regs();
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let r = T::regs();
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configure(r, &config, T::frequency(), T::MULTIPLIER);
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unsafe {
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unsafe {
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rx.set_as_af(rx.af_num(), AFType::Input);
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rx.set_as_af(rx.af_num(), AFType::Input);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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}
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r.cr2().write(|_w| {});
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configure(r, &config, T::frequency(), T::MULTIPLIER, true, true);
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r.cr3().write(|_w| {});
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r.cr1().write(|w| {
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unsafe {
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w.set_ue(true);
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r.cr1().modify(|w| {
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w.set_te(true);
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w.set_re(true);
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w.set_m0(if config.parity != Parity::ParityNone {
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vals::M0::BIT9
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} else {
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vals::M0::BIT8
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});
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w.set_pce(config.parity != Parity::ParityNone);
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w.set_ps(match config.parity {
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Parity::ParityOdd => vals::Ps::ODD,
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Parity::ParityEven => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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});
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w.set_rxneie(true);
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w.set_rxneie(true);
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w.set_idleie(true);
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w.set_idleie(true);
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});
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});
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@ -102,7 +102,59 @@ pub struct UartRx<'d, T: BasicInstance, RxDma = NoDma> {
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}
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}
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impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> {
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impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> {
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fn new(tx_dma: PeripheralRef<'d, TxDma>) -> Self {
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/// usefull if you only want Uart Tx. It saves 1 pin and consumes a little less power
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pub fn new(
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peri: impl Peripheral<P = T> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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tx_dma: impl Peripheral<P = TxDma> + 'd,
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config: Config,
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) -> Self {
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T::enable();
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T::reset();
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Self::new_inner(peri, tx, tx_dma, config)
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}
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pub fn new_with_cts(
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peri: impl Peripheral<P = T> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
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tx_dma: impl Peripheral<P = TxDma> + 'd,
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config: Config,
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) -> Self {
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into_ref!(cts);
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T::enable();
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T::reset();
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unsafe {
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cts.set_as_af(cts.af_num(), AFType::Input);
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T::regs().cr3().write(|w| {
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w.set_ctse(true);
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});
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}
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Self::new_inner(peri, tx, tx_dma, config)
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}
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fn new_inner(
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_peri: impl Peripheral<P = T> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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tx_dma: impl Peripheral<P = TxDma> + 'd,
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config: Config,
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) -> Self {
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into_ref!(_peri, tx, tx_dma);
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let r = T::regs();
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unsafe {
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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}
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configure(r, &config, T::frequency(), T::MULTIPLIER, false, true);
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// create state once!
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let _s = T::state();
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Self {
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Self {
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tx_dma,
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tx_dma,
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phantom: PhantomData,
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phantom: PhantomData,
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@ -156,44 +208,52 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
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rx_dma: impl Peripheral<P = RxDma> + 'd,
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rx_dma: impl Peripheral<P = RxDma> + 'd,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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into_ref!(peri, irq, rx, rx_dma);
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T::enable();
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T::reset();
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Self::new_inner(peri, irq, rx, rx_dma, config)
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}
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pub fn new_with_rts(
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peri: impl Peripheral<P = T> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
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rx_dma: impl Peripheral<P = RxDma> + 'd,
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config: Config,
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) -> Self {
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into_ref!(rts);
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T::enable();
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T::enable();
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T::reset();
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T::reset();
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let r = T::regs();
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unsafe {
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rts.set_as_af(rts.af_num(), AFType::OutputPushPull);
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T::regs().cr3().write(|w| {
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w.set_rtse(true);
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});
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}
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configure(r, &config, T::frequency(), T::MULTIPLIER);
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Self::new_inner(peri, irq, rx, rx_dma, config)
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}
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fn new_inner(
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peri: impl Peripheral<P = T> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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rx_dma: impl Peripheral<P = RxDma> + 'd,
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config: Config,
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) -> Self {
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into_ref!(peri, irq, rx, rx_dma);
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let r = T::regs();
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unsafe {
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unsafe {
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rx.set_as_af(rx.af_num(), AFType::Input);
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rx.set_as_af(rx.af_num(), AFType::Input);
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r.cr2().write(|_w| {});
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r.cr3().write(|w| {
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// enable Error Interrupt: (Frame error, Noise error, Overrun error)
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w.set_eie(true);
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});
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r.cr1().write(|w| {
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// enable uart
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w.set_ue(true);
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// enable receiver
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w.set_re(true);
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// configure word size
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w.set_m0(if config.parity != Parity::ParityNone {
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vals::M0::BIT9
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} else {
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vals::M0::BIT8
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});
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// configure parity
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w.set_pce(config.parity != Parity::ParityNone);
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w.set_ps(match config.parity {
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Parity::ParityOdd => vals::Ps::ODD,
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Parity::ParityEven => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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});
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});
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}
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}
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configure(r, &config, T::frequency(), T::MULTIPLIER, true, false);
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irq.set_handler(Self::on_interrupt);
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irq.set_handler(Self::on_interrupt);
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irq.unpend();
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irq.unpend();
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irq.enable();
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irq.enable();
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@ -563,31 +623,13 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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let r = T::regs();
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let r = T::regs();
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configure(r, &config, T::frequency(), T::MULTIPLIER);
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unsafe {
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unsafe {
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rx.set_as_af(rx.af_num(), AFType::Input);
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rx.set_as_af(rx.af_num(), AFType::Input);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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r.cr2().write(|_w| {});
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r.cr1().write(|w| {
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w.set_ue(true);
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w.set_te(true);
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w.set_re(true);
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w.set_m0(if config.parity != Parity::ParityNone {
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vals::M0::BIT9
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} else {
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vals::M0::BIT8
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});
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w.set_pce(config.parity != Parity::ParityNone);
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w.set_ps(match config.parity {
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Parity::ParityOdd => vals::Ps::ODD,
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Parity::ParityEven => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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});
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});
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}
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}
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configure(r, &config, T::frequency(), T::MULTIPLIER, true, true);
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irq.set_handler(UartRx::<T, RxDma>::on_interrupt);
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irq.set_handler(UartRx::<T, RxDma>::on_interrupt);
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irq.unpend();
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irq.unpend();
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irq.enable();
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irq.enable();
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@ -596,7 +638,10 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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let _s = T::state();
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let _s = T::state();
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Self {
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Self {
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tx: UartTx::new(tx_dma),
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tx: UartTx {
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tx_dma,
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phantom: PhantomData,
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},
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rx: UartRx {
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rx: UartRx {
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_peri: peri,
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_peri: peri,
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rx_dma,
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rx_dma,
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@ -650,12 +695,38 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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}
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}
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}
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}
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fn configure(r: Regs, config: &Config, pclk_freq: Hertz, multiplier: u32) {
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fn configure(r: Regs, config: &Config, pclk_freq: Hertz, multiplier: u32, enable_rx: bool, enable_tx: bool) {
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if !enable_rx && !enable_tx {
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panic!("USART: At least one of RX or TX should be enabled");
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}
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// TODO: better calculation, including error checking and OVER8 if possible.
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// TODO: better calculation, including error checking and OVER8 if possible.
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let div = (pclk_freq.0 + (config.baudrate / 2)) / config.baudrate * multiplier;
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let div = (pclk_freq.0 + (config.baudrate / 2)) / config.baudrate * multiplier;
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unsafe {
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unsafe {
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r.brr().write_value(regs::Brr(div));
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r.brr().write_value(regs::Brr(div));
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r.cr2().write(|_w| {});
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r.cr1().write(|w| {
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// enable uart
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w.set_ue(true);
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// enable transceiver
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w.set_te(enable_tx);
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// enable receiver
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w.set_re(enable_rx);
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// configure word size
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w.set_m0(if config.parity != Parity::ParityNone {
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vals::M0::BIT9
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} else {
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vals::M0::BIT8
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});
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// configure parity
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w.set_pce(config.parity != Parity::ParityNone);
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w.set_ps(match config.parity {
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Parity::ParityOdd => vals::Ps::ODD,
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Parity::ParityEven => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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});
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});
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}
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}
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}
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}
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