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@ -47,11 +47,9 @@ pub unsafe fn init() {
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start_xosc();
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// Before we touch PLLs, switch sys and ref cleanly away from their aux sources.
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c.clk_sys_ctrl()
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.modify(|w| w.set_src(ClkSysCtrlSrc::CLK_REF));
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c.clk_sys_ctrl().modify(|w| w.set_src(ClkSysCtrlSrc::CLK_REF));
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while c.clk_sys_selected().read() != 1 {}
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c.clk_ref_ctrl()
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.modify(|w| w.set_src(ClkRefCtrlSrc::ROSC_CLKSRC_PH));
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c.clk_ref_ctrl().modify(|w| w.set_src(ClkRefCtrlSrc::ROSC_CLKSRC_PH));
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while c.clk_ref_selected().read() != 1 {}
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// Configure PLLs
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@ -135,9 +133,7 @@ unsafe fn start_xosc() {
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.write(|w| w.set_freq_range(pac::xosc::vals::CtrlFreqRange::_1_15MHZ));
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let startup_delay = (((XOSC_MHZ * 1_000_000) / 1000) + 128) / 256;
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pac::XOSC
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.startup()
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.write(|w| w.set_delay(startup_delay as u16));
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pac::XOSC.startup().write(|w| w.set_delay(startup_delay as u16));
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pac::XOSC.ctrl().write(|w| {
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w.set_freq_range(pac::xosc::vals::CtrlFreqRange::_1_15MHZ);
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w.set_enable(pac::xosc::vals::Enable::ENABLE);
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@ -145,13 +141,7 @@ unsafe fn start_xosc() {
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while !pac::XOSC.status().read().stable() {}
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}
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unsafe fn configure_pll(
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p: pac::pll::Pll,
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refdiv: u32,
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vco_freq: u32,
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post_div1: u8,
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post_div2: u8,
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) {
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unsafe fn configure_pll(p: pac::pll::Pll, refdiv: u32, vco_freq: u32, post_div1: u8, post_div2: u8) {
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let ref_freq = XOSC_MHZ * 1_000_000 / refdiv;
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let fbdiv = vco_freq / ref_freq;
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@ -1,13 +1,11 @@
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use core::convert::Infallible;
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use core::marker::PhantomData;
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use crate::pac;
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use embassy_hal_common::{unborrow, unsafe_impl_unborrow};
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use crate::pac::common::{Reg, RW};
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use crate::pac::SIO;
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use crate::peripherals;
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use crate::Unborrow;
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use embassy_hal_common::{unborrow, unsafe_impl_unborrow};
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use crate::{pac, peripherals, Unborrow};
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/// Represents a digital input or output level.
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#[derive(Debug, Eq, PartialEq)]
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@ -195,10 +193,7 @@ impl<'d, T: Pin> OutputOpenDrain<'d, T> {
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pub fn set_high(&mut self) {
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// For Open Drain High, disable the output pin.
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unsafe {
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self.pin
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.sio_oe()
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.value_clr()
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.write_value(1 << self.pin.pin());
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self.pin.sio_oe().value_clr().write_value(1 << self.pin.pin());
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}
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}
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@ -207,10 +202,7 @@ impl<'d, T: Pin> OutputOpenDrain<'d, T> {
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pub fn set_low(&mut self) {
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// For Open Drain Low, enable the output pin.
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unsafe {
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self.pin
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.sio_oe()
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.value_set()
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.write_value(1 << self.pin.pin());
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self.pin.sio_oe().value_set().write_value(1 << self.pin.pin());
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}
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}
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@ -5,9 +5,9 @@
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// Re-exports
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pub use embassy_cortex_m::interrupt::*;
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use embassy_macros::cortex_m_interrupt_declare as declare;
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::cortex_m_interrupt_declare as declare;
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declare!(TIMER_IRQ_0);
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declare!(TIMER_IRQ_1);
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declare!(TIMER_IRQ_2);
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@ -17,15 +17,14 @@ mod reset;
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// Reexports
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pub use embassy_cortex_m::executor;
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pub use embassy_hal_common::{unborrow, Unborrow};
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pub use embassy_macros::cortex_m_interrupt as interrupt;
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#[cfg(feature = "unstable-pac")]
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pub use rp2040_pac2 as pac;
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#[cfg(not(feature = "unstable-pac"))]
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pub(crate) use rp2040_pac2 as pac;
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pub use embassy_cortex_m::executor;
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pub use embassy_hal_common::{unborrow, Unborrow};
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pub use embassy_macros::cortex_m_interrupt as interrupt;
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embassy_hal_common::peripherals! {
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PIN_0,
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PIN_1,
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@ -1,7 +1,7 @@
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use crate::pac;
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pub use pac::resets::regs::Peripherals;
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use crate::pac;
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pub const ALL_PERIPHERALS: Peripherals = Peripherals(0x01ffffff);
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pub unsafe fn reset(peris: Peripherals) {
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@ -10,8 +10,6 @@ pub unsafe fn reset(peris: Peripherals) {
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pub unsafe fn unreset_wait(peris: Peripherals) {
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// TODO use the "atomic clear" register version
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pac::RESETS
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.reset()
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.modify(|v| *v = Peripherals(v.0 & !peris.0));
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pac::RESETS.reset().modify(|v| *v = Peripherals(v.0 & !peris.0));
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while ((!pac::RESETS.reset_done().read().0) & peris.0) != 0 {}
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}
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@ -1,13 +1,11 @@
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use core::marker::PhantomData;
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use crate::Unborrow;
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use embassy_hal_common::unborrow;
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pub use embedded_hal_02::spi::{Phase, Polarity};
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use crate::gpio::sealed::Pin as _;
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use crate::gpio::{AnyPin, Pin as GpioPin};
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use crate::{pac, peripherals};
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pub use embedded_hal_02::spi::{Phase, Polarity};
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use crate::{pac, peripherals, Unborrow};
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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@ -56,11 +54,7 @@ fn calc_prescs(freq: u32) -> (u8, u8) {
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}
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let presc = div_roundup(ratio, 256);
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let postdiv = if presc == 1 {
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ratio
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} else {
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div_roundup(ratio, presc)
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};
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let postdiv = if presc == 1 { ratio } else { div_roundup(ratio, presc) };
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((presc * 2) as u8, (postdiv - 1) as u8)
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}
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@ -91,14 +85,7 @@ impl<'d, T: Instance> Spi<'d, T> {
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config: Config,
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) -> Self {
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unborrow!(clk, mosi);
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Self::new_inner(
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inner,
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Some(clk.degrade()),
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Some(mosi.degrade()),
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None,
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None,
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config,
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)
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Self::new_inner(inner, Some(clk.degrade()), Some(mosi.degrade()), None, None, config)
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}
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pub fn new_rxonly(
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@ -108,14 +95,7 @@ impl<'d, T: Instance> Spi<'d, T> {
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config: Config,
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) -> Self {
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unborrow!(clk, miso);
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Self::new_inner(
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inner,
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Some(clk.degrade()),
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None,
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Some(miso.degrade()),
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None,
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config,
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)
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Self::new_inner(inner, Some(clk.degrade()), None, Some(miso.degrade()), None, config)
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}
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fn new_inner(
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@ -1,11 +1,12 @@
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use crate::interrupt::{Interrupt, InterruptExt};
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use atomic_polyfill::{AtomicU8, Ordering};
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use core::cell::Cell;
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use atomic_polyfill::{AtomicU8, Ordering};
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use critical_section::CriticalSection;
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use embassy::blocking_mutex::raw::CriticalSectionRawMutex;
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use embassy::blocking_mutex::Mutex;
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use embassy::time::driver::{AlarmHandle, Driver};
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::{interrupt, pac};
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struct AlarmState {
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@ -45,15 +46,13 @@ impl Driver for TimerDriver {
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}
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unsafe fn allocate_alarm(&self) -> Option<AlarmHandle> {
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let id = self
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.next_alarm
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.fetch_update(Ordering::AcqRel, Ordering::Acquire, |x| {
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if x < ALARM_COUNT as u8 {
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Some(x + 1)
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} else {
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None
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}
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});
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let id = self.next_alarm.fetch_update(Ordering::AcqRel, Ordering::Acquire, |x| {
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if x < ALARM_COUNT as u8 {
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Some(x + 1)
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} else {
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None
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}
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});
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match id {
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Ok(id) => Some(AlarmHandle::new(id)),
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@ -1,10 +1,9 @@
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use core::marker::PhantomData;
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use crate::Unborrow;
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use embassy_hal_common::unborrow;
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use gpio::Pin;
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use crate::{gpio, pac, peripherals};
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use crate::{gpio, pac, peripherals, Unborrow};
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#[non_exhaustive]
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pub struct Config {
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@ -57,10 +56,8 @@ impl<'d, T: Instance> Uart<'d, T> {
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}
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// Load PL011's baud divisor registers
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p.uartibrd()
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.write_value(pac::uart::regs::Uartibrd(baud_ibrd));
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p.uartfbrd()
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.write_value(pac::uart::regs::Uartfbrd(baud_fbrd));
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p.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd));
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p.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd));
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p.uartlcr_h().write(|w| {
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w.set_wlen(config.data_bits - 5);
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