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Run rustfmt.

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This commit is contained in:
Dario Nieuwenhuis
2022-06-12 22:15:44 +02:00
parent 6199bdea71
commit a8703b7598
340 changed files with 1326 additions and 3020 deletions
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5
embassy-stm32/src/eth/generic_smi.rs
View File

@ -51,10 +51,7 @@ unsafe impl PHY for GenericSMI {
Self::smi_write_ext(sm, PHY_REG_WUCSR, 0);
// Enable auto-negotiation
sm.smi_write(
PHY_REG_BCR,
PHY_REG_BCR_AN | PHY_REG_BCR_ANRST | PHY_REG_BCR_100M,
);
sm.smi_write(PHY_REG_BCR, PHY_REG_BCR_AN | PHY_REG_BCR_ANRST | PHY_REG_BCR_100M);
}
fn poll_link<S: StationManagement>(sm: &mut S) -> bool {

25
embassy-stm32/src/eth/v1/mod.rs
View File

@ -4,33 +4,30 @@ use core::marker::PhantomData;
use core::sync::atomic::{fence, Ordering};
use core::task::Waker;
use crate::Unborrow;
use embassy::waitqueue::AtomicWaker;
use embassy_cortex_m::peripheral::{PeripheralMutex, PeripheralState, StateStorage};
use embassy_hal_common::unborrow;
use embassy_net::{Device, DeviceCapabilities, LinkState, PacketBuf, MTU};
use crate::gpio::sealed::Pin as __GpioPin;
use crate::gpio::{sealed::AFType, AnyPin, Speed};
use crate::gpio::sealed::{AFType, Pin as __GpioPin};
use crate::gpio::{AnyPin, Speed};
#[cfg(eth_v1a)]
use crate::pac::AFIO;
#[cfg(any(eth_v1b, eth_v1c))]
use crate::pac::SYSCFG;
use crate::pac::{ETH, RCC};
use crate::Unborrow;
mod descriptors;
mod rx_desc;
mod tx_desc;
use super::*;
use descriptors::DescriptorRing;
use stm32_metapac::eth::vals::{
Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf,
};
use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf};
pub struct State<'d, T: Instance, const TX: usize, const RX: usize>(
StateStorage<Inner<'d, T, TX, RX>>,
);
use super::*;
pub struct State<'d, T: Instance, const TX: usize, const RX: usize>(StateStorage<Inner<'d, T, TX, RX>>);
impl<'d, T: Instance, const TX: usize, const RX: usize> State<'d, T, TX, RX> {
pub fn new() -> Self {
Self(StateStorage::new())
@ -300,9 +297,7 @@ unsafe impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> StationMa
}
}
impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Device
for Ethernet<'d, T, P, TX, RX>
{
impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Device for Ethernet<'d, T, P, TX, RX> {
fn is_transmit_ready(&mut self) -> bool {
self.state.with(|s| s.desc_ring.tx.available())
}
@ -339,9 +334,7 @@ impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Device
}
}
impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Drop
for Ethernet<'d, T, P, TX, RX>
{
impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Drop for Ethernet<'d, T, P, TX, RX> {
fn drop(&mut self) {
// NOTE(unsafe) We have `&mut self` and the interrupt doesn't use this registers
unsafe {

12
embassy-stm32/src/eth/v1/rx_desc.rs
View File

@ -59,8 +59,7 @@ impl RDes {
//
// Contains first buffer of packet AND contains last buf of
// packet AND no errors
(self.rdes0.get() & (RXDESC_0_ES | RXDESC_0_FS | RXDESC_0_LS))
== (RXDESC_0_FS | RXDESC_0_LS)
(self.rdes0.get() & (RXDESC_0_ES | RXDESC_0_FS | RXDESC_0_LS)) == (RXDESC_0_FS | RXDESC_0_LS)
}
/// Return true if this RDes is not currently owned by the DMA
@ -72,8 +71,7 @@ impl RDes {
/// Configures the reception buffer address and length and passed descriptor ownership to the DMA
#[inline(always)]
pub fn set_ready(&mut self, buf_addr: u32, buf_len: usize) {
self.rdes1
.set(self.rdes1.get() | (buf_len as u32) & RXDESC_1_RBS_MASK);
self.rdes1.set(self.rdes1.get() | (buf_len as u32) & RXDESC_1_RBS_MASK);
self.rdes2.set(buf_addr);
// "Preceding reads and writes cannot be moved past subsequent writes."
@ -220,11 +218,7 @@ impl<const N: usize> RDesRing<N> {
// We already have fences in `set_owned`, which is called in `setup`
// Start receive
unsafe {
ETH.ethernet_dma()
.dmaomr()
.modify(|w| w.set_sr(DmaomrSr::STARTED))
};
unsafe { ETH.ethernet_dma().dmaomr().modify(|w| w.set_sr(DmaomrSr::STARTED)) };
self.demand_poll();
}

9
embassy-stm32/src/eth/v1/tx_desc.rs
View File

@ -100,8 +100,7 @@ impl TDes {
// set up as a part fo the ring buffer - configures the tdes
pub fn setup(&mut self, next: Option<&Self>) {
// Defer this initialization to this function, so we can have `RingEntry` on bss.
self.tdes0
.set(TXDESC_0_TCH | TXDESC_0_IOC | TXDESC_0_FS | TXDESC_0_LS);
self.tdes0.set(TXDESC_0_TCH | TXDESC_0_IOC | TXDESC_0_FS | TXDESC_0_LS);
match next {
Some(next) => self.set_buffer2(next as *const TDes as *const u8),
None => {
@ -169,11 +168,7 @@ impl<const N: usize> TDesRing<N> {
// volatiles
// Start transmission
unsafe {
ETH.ethernet_dma()
.dmaomr()
.modify(|w| w.set_st(St::STARTED))
};
unsafe { ETH.ethernet_dma().dmaomr().modify(|w| w.set_st(St::STARTED)) };
}
/// Return true if a TDes is available for use

12
embassy-stm32/src/eth/v2/descriptors.rs
View File

@ -101,11 +101,9 @@ impl<const N: usize> TDesRing<N> {
unsafe {
let dma = ETH.ethernet_dma();
dma.dmactx_dlar()
.write(|w| w.0 = &self.td as *const _ as u32);
dma.dmactx_dlar().write(|w| w.0 = &self.td as *const _ as u32);
dma.dmactx_rlr().write(|w| w.set_tdrl((N as u16) - 1));
dma.dmactx_dtpr()
.write(|w| w.0 = &self.td[0] as *const _ as u32);
dma.dmactx_dtpr().write(|w| w.0 = &self.td[0] as *const _ as u32);
}
}
@ -127,8 +125,7 @@ impl<const N: usize> TDesRing<N> {
// Read format
td.tdes0.set(address);
td.tdes2
.set(pkt_len as u32 & EMAC_TDES2_B1L | EMAC_TDES2_IOC);
td.tdes2.set(pkt_len as u32 & EMAC_TDES2_B1L | EMAC_TDES2_IOC);
// FD: Contains first buffer of packet
// LD: Contains last buffer of packet
@ -225,8 +222,7 @@ impl RDes {
#[inline(always)]
pub fn set_ready(&mut self, buf_addr: u32) {
self.rdes0.set(buf_addr);
self.rdes3
.set(EMAC_RDES3_BUF1V | EMAC_RDES3_IOC | EMAC_DES3_OWN);
self.rdes3.set(EMAC_RDES3_BUF1V | EMAC_RDES3_IOC | EMAC_DES3_OWN);
}
}

21
embassy-stm32/src/eth/v2/mod.rs
View File

@ -2,23 +2,22 @@ use core::marker::PhantomData;
use core::sync::atomic::{fence, Ordering};
use core::task::Waker;
use crate::Unborrow;
use embassy::waitqueue::AtomicWaker;
use embassy_cortex_m::peripheral::{PeripheralMutex, PeripheralState, StateStorage};
use embassy_hal_common::unborrow;
use embassy_net::{Device, DeviceCapabilities, LinkState, PacketBuf, MTU};
use crate::gpio::sealed::Pin as _;
use crate::gpio::{sealed::AFType, AnyPin, Speed};
use crate::gpio::sealed::{AFType, Pin as _};
use crate::gpio::{AnyPin, Speed};
use crate::pac::{ETH, RCC, SYSCFG};
use crate::Unborrow;
mod descriptors;
use super::*;
use descriptors::DescriptorRing;
pub struct State<'d, T: Instance, const TX: usize, const RX: usize>(
StateStorage<Inner<'d, T, TX, RX>>,
);
use super::*;
pub struct State<'d, T: Instance, const TX: usize, const RX: usize>(StateStorage<Inner<'d, T, TX, RX>>);
impl<'d, T: Instance, const TX: usize, const RX: usize> State<'d, T, TX, RX> {
pub fn new() -> Self {
Self(StateStorage::new())
@ -234,9 +233,7 @@ unsafe impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> StationMa
}
}
impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Device
for Ethernet<'d, T, P, TX, RX>
{
impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Device for Ethernet<'d, T, P, TX, RX> {
fn is_transmit_ready(&mut self) -> bool {
self.state.with(|s| s.desc_ring.tx.available())
}
@ -273,9 +270,7 @@ impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Device
}
}
impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Drop
for Ethernet<'d, T, P, TX, RX>
{
impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Drop for Ethernet<'d, T, P, TX, RX> {
fn drop(&mut self) {
// NOTE(unsafe) We have `&mut self` and the interrupt doesn't use this registers
unsafe {