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@ -4,33 +4,30 @@ use core::marker::PhantomData;
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use core::sync::atomic::{fence, Ordering};
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use core::task::Waker;
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use crate::Unborrow;
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use embassy::waitqueue::AtomicWaker;
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use embassy_cortex_m::peripheral::{PeripheralMutex, PeripheralState, StateStorage};
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use embassy_hal_common::unborrow;
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use embassy_net::{Device, DeviceCapabilities, LinkState, PacketBuf, MTU};
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use crate::gpio::sealed::Pin as __GpioPin;
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use crate::gpio::{sealed::AFType, AnyPin, Speed};
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use crate::gpio::sealed::{AFType, Pin as __GpioPin};
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use crate::gpio::{AnyPin, Speed};
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#[cfg(eth_v1a)]
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use crate::pac::AFIO;
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#[cfg(any(eth_v1b, eth_v1c))]
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use crate::pac::SYSCFG;
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use crate::pac::{ETH, RCC};
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use crate::Unborrow;
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mod descriptors;
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mod rx_desc;
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mod tx_desc;
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use super::*;
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use descriptors::DescriptorRing;
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use stm32_metapac::eth::vals::{
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Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf,
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};
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use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf};
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pub struct State<'d, T: Instance, const TX: usize, const RX: usize>(
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StateStorage<Inner<'d, T, TX, RX>>,
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);
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use super::*;
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pub struct State<'d, T: Instance, const TX: usize, const RX: usize>(StateStorage<Inner<'d, T, TX, RX>>);
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impl<'d, T: Instance, const TX: usize, const RX: usize> State<'d, T, TX, RX> {
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pub fn new() -> Self {
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Self(StateStorage::new())
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@ -300,9 +297,7 @@ unsafe impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> StationMa
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}
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}
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impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Device
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for Ethernet<'d, T, P, TX, RX>
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{
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impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Device for Ethernet<'d, T, P, TX, RX> {
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fn is_transmit_ready(&mut self) -> bool {
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self.state.with(|s| s.desc_ring.tx.available())
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}
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@ -339,9 +334,7 @@ impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Device
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}
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}
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impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Drop
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for Ethernet<'d, T, P, TX, RX>
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{
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impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Drop for Ethernet<'d, T, P, TX, RX> {
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fn drop(&mut self) {
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// NOTE(unsafe) We have `&mut self` and the interrupt doesn't use this registers
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unsafe {
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@ -59,8 +59,7 @@ impl RDes {
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//
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// Contains first buffer of packet AND contains last buf of
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// packet AND no errors
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(self.rdes0.get() & (RXDESC_0_ES | RXDESC_0_FS | RXDESC_0_LS))
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== (RXDESC_0_FS | RXDESC_0_LS)
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(self.rdes0.get() & (RXDESC_0_ES | RXDESC_0_FS | RXDESC_0_LS)) == (RXDESC_0_FS | RXDESC_0_LS)
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}
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/// Return true if this RDes is not currently owned by the DMA
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@ -72,8 +71,7 @@ impl RDes {
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/// Configures the reception buffer address and length and passed descriptor ownership to the DMA
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#[inline(always)]
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pub fn set_ready(&mut self, buf_addr: u32, buf_len: usize) {
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self.rdes1
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.set(self.rdes1.get() | (buf_len as u32) & RXDESC_1_RBS_MASK);
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self.rdes1.set(self.rdes1.get() | (buf_len as u32) & RXDESC_1_RBS_MASK);
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self.rdes2.set(buf_addr);
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// "Preceding reads and writes cannot be moved past subsequent writes."
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@ -220,11 +218,7 @@ impl<const N: usize> RDesRing<N> {
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// We already have fences in `set_owned`, which is called in `setup`
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// Start receive
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unsafe {
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ETH.ethernet_dma()
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.dmaomr()
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.modify(|w| w.set_sr(DmaomrSr::STARTED))
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};
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unsafe { ETH.ethernet_dma().dmaomr().modify(|w| w.set_sr(DmaomrSr::STARTED)) };
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self.demand_poll();
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}
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@ -100,8 +100,7 @@ impl TDes {
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// set up as a part fo the ring buffer - configures the tdes
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pub fn setup(&mut self, next: Option<&Self>) {
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// Defer this initialization to this function, so we can have `RingEntry` on bss.
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self.tdes0
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.set(TXDESC_0_TCH | TXDESC_0_IOC | TXDESC_0_FS | TXDESC_0_LS);
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self.tdes0.set(TXDESC_0_TCH | TXDESC_0_IOC | TXDESC_0_FS | TXDESC_0_LS);
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match next {
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Some(next) => self.set_buffer2(next as *const TDes as *const u8),
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None => {
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@ -169,11 +168,7 @@ impl<const N: usize> TDesRing<N> {
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// volatiles
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// Start transmission
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unsafe {
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ETH.ethernet_dma()
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.dmaomr()
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.modify(|w| w.set_st(St::STARTED))
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};
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unsafe { ETH.ethernet_dma().dmaomr().modify(|w| w.set_st(St::STARTED)) };
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}
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/// Return true if a TDes is available for use
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