stm32/rcc: cleanup merge

embassy-stm32/src/rcc/common.rs

@@ -142,7 +142,7 @@ impl Div<APBPrescaler> for Hertz {
     }
 }
 
-#[cfg(not(any(rcc_f1, rcc_g4, rcc_h7, rcc_wb, rcc_wl5, rcc_wle)))]
+#[cfg(not(any(rcc_f1, rcc_f100, rcc_f1cl, rcc_g4, rcc_h7, rcc_h7ab, rcc_wb, rcc_wl5, rcc_wle)))]
 impl From<APBPrescaler> for rcc::vals::Ppre {
     fn from(val: APBPrescaler) -> rcc::vals::Ppre {
         use rcc::vals::Ppre;

embassy-stm32/src/rcc/g0.rs

@@ -380,7 +380,7 @@ pub(crate) unsafe fn init(config: Config) {
         APBPrescaler::NotDivided => (ahb_freq.0, ahb_freq.0),
         pre => {
             let pre: Ppre = pre.into();
-            let pre: u8 = 1 << (pre.0 - 3);
+            let pre: u8 = 1 << (pre.to_bits() - 3);
             let freq = ahb_freq.0 / pre as u32;
             (freq, freq * 2)
         }

embassy-stm32/src/rcc/g4.rs

@@ -22,8 +22,15 @@ pub enum ClockSrc {
     PLL,
 }
 
-impl Into<u8> for APBPrescaler {
+/// PLL clock input source
-    fn into(self) -> u8 {
+#[derive(Clone, Copy, Debug)]
+pub enum PllSrc {
+    HSI16,
+    HSE(Hertz),
+}
+
+impl Into<Pllsrc> for PllSrc {
+    fn into(self) -> Pllsrc {
         match self {
             PllSrc::HSE(..) => Pllsrc::HSE,
             PllSrc::HSI16 => Pllsrc::HSI16,

embassy-stm32/src/rcc/wb.rs

@@ -1,7 +1,6 @@
 pub use super::common::{AHBPrescaler, APBPrescaler};
-use crate::pac::RCC;
+use crate::rcc::Clocks;
-use crate::rcc::{set_freqs, Clocks, Clocks};
+use crate::time::{khz, mhz, Hertz};
-use crate::time::{khz, mhz, Hertz, Hertz};
 
 /// Most of clock setup is copied from stm32l0xx-hal, and adopted to the generated PAC,
 /// and with the addition of the init function to configure a system clock.

embassy-stm32/src/rcc/wl.rs

@@ -1,6 +1,6 @@
 pub use super::common::{AHBPrescaler, APBPrescaler, VoltageScale};
 use crate::pac::pwr::vals::Dbp;
-use crate::pac::{FLASH, FLASH, PWR, RCC, RCC};
+use crate::pac::{FLASH, PWR, RCC};
 use crate::rcc::{set_freqs, Clocks};
 use crate::time::Hertz;