stm32/rcc: revert part of #2106
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2765f0978f
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@ -152,9 +152,9 @@ pub(crate) unsafe fn init(config: Config) {
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source: config.pll_src,
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};
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let pll = init_pll(PllInstance::Pll, config.pll, &pll_input);
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#[cfg(any(all(stm32f4, not(any(stm32f410, stm32f429))), stm32f7))]
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#[cfg(any(all(stm32f4, not(stm32f410)), stm32f7))]
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let _plli2s = init_pll(PllInstance::Plli2s, config.plli2s, &pll_input);
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#[cfg(all(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7), not(stm32f429)))]
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#[cfg(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7))]
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let _pllsai = init_pll(PllInstance::Pllsai, config.pllsai, &pll_input);
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// Configure sysclk
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@ -197,25 +197,15 @@ pub(crate) unsafe fn init(config: Config) {
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pclk2_tim,
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rtc,
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pll1_q: pll.q,
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#[cfg(all(rcc_f4, not(any(stm32f410, stm32f429))))]
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#[cfg(all(rcc_f4, not(stm32f410)))]
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plli2s1_q: _plli2s.q,
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#[cfg(all(rcc_f4, not(any(stm32f410, stm32f429))))]
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#[cfg(all(rcc_f4, not(stm32f410)))]
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plli2s1_r: _plli2s.r,
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#[cfg(stm32f429)]
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plli2s1_q: None,
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#[cfg(stm32f429)]
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plli2s1_r: None,
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#[cfg(any(stm32f427, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
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#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
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pllsai1_q: _pllsai.q,
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#[cfg(any(stm32f427, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
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#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
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pllsai1_r: _pllsai.r,
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#[cfg(stm32f429)]
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pllsai1_q: None,
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#[cfg(stm32f429)]
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pllsai1_r: None,
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});
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}
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@ -233,7 +223,6 @@ struct PllOutput {
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r: Option<Hertz>,
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}
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#[allow(dead_code)]
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#[derive(PartialEq, Eq, Clone, Copy)]
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enum PllInstance {
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Pll,
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