Mark clear_interrupt_flag as unsafe
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6b08c70273
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@ -483,16 +483,14 @@ fn sr(r: crate::pac::usart::Usart) -> crate::pac::common::Reg<regs::Sr, crate::p
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}
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}
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#[cfg(usart_v1)]
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#[cfg(usart_v1)]
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fn clear_interrupt_flag(r: crate::pac::usart::Usart, _flag: InterruptFlag) {
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unsafe fn clear_interrupt_flag(r: crate::pac::usart::Usart, _flag: InterruptFlag) {
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// This bit is set by hardware when noise is detected on a received frame. It is cleared by a
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// This bit is set by hardware when noise is detected on a received frame. It is cleared by a
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// software sequence (an read to the USART_SR register followed by a read to the
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// software sequence (an read to the USART_SR register followed by a read to the
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// USART_DR register).
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// USART_DR register).
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// this is the same as what st's HAL does on v1 hardware
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// this is the same as what st's HAL does on v1 hardware
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unsafe {
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r.sr().read();
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r.sr().read();
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r.dr().read();
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r.dr().read();
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}
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}
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}
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#[cfg(usart_v2)]
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#[cfg(usart_v2)]
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@ -512,7 +510,7 @@ fn sr(r: crate::pac::usart::Usart) -> crate::pac::common::Reg<regs::Ixr, crate::
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#[cfg(usart_v2)]
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#[cfg(usart_v2)]
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#[inline]
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#[inline]
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fn clear_interrupt_flag(r: crate::pac::usart::Usart, flag: InterruptFlag) {
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unsafe fn clear_interrupt_flag(r: crate::pac::usart::Usart, flag: InterruptFlag) {
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// v2 has a separate register for clearing flags (nice)
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// v2 has a separate register for clearing flags (nice)
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match flag {
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match flag {
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InterruptFlag::PE => r.icr().write(|w| {
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InterruptFlag::PE => r.icr().write(|w| {
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