From aae0431d3178f44a412a3c94536335c02a57dd06 Mon Sep 17 00:00:00 2001
From: Thales Fragoso <thales.fragosoz@gmail.com>
Date: Sat, 17 Jul 2021 16:08:13 -0300
Subject: [PATCH] stm32: Clear possible set flags after disabling DMA

---
 embassy-stm32/src/dma/bdma.rs | 5 +++++
 embassy-stm32/src/dma/dma.rs  | 7 +++++++
 stm32-data                    | 2 +-
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs
index 4c26a950..5063ec2e 100644
--- a/embassy-stm32/src/dma/bdma.rs
+++ b/embassy-stm32/src/dma/bdma.rs
@@ -66,6 +66,11 @@ pub(crate) async unsafe fn do_transfer(
             w.set_en(false);
         });
         while ch.cr().read().en() {}
+
+        // Disabling the DMA mid transfer might cause some flags to be set, clear them all for the
+        // next transfer
+        dma.ifcr()
+            .write(|w| w.set_gif(channel_number as usize, true));
     });
 
     #[cfg(dmamux)]
diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs
index 591279ef..8634de20 100644
--- a/embassy-stm32/src/dma/dma.rs
+++ b/embassy-stm32/src/dma/dma.rs
@@ -67,6 +67,13 @@ pub(crate) async unsafe fn do_transfer(
             w.set_en(false);
         });
         while ch.cr().read().en() {}
+
+        // Disabling the DMA mid transfer might cause some flags to be set, clear them all for the
+        // next transfer
+        dma.ifcr(channel_number as usize / 4).write(|w| {
+            w.set_tcif(channel_number as usize % 4, true);
+            w.set_teif(channel_number as usize % 4, true);
+        });
     });
 
     #[cfg(dmamux)]
diff --git a/stm32-data b/stm32-data
index 8702a3a3..ce2e32b9 160000
--- a/stm32-data
+++ b/stm32-data
@@ -1 +1 @@
-Subproject commit 8702a3a3bb83a59515dab2cf9f75952fa6edae8a
+Subproject commit ce2e32b927a3637d975e780274b8e0c985f5d992