548: Set Uarte log levels to trace r=lulf a=huntc

I noticed lots of logging which really slows things down and is not useful outside of a debugging context, hence set to trace.

Co-authored-by: huntc <huntchr@gmail.com>
This commit is contained in:
bors[bot] 2021-12-17 06:39:49 +00:00 committed by GitHub
commit ad2f469407
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@ -213,7 +213,7 @@ impl<'d, T: Instance> Write for UarteTx<'d, T> {
let s = T::state(); let s = T::state();
let drop = OnDrop::new(move || { let drop = OnDrop::new(move || {
info!("write drop: stopping"); trace!("write drop: stopping");
r.intenclr.write(|w| w.endtx().clear()); r.intenclr.write(|w| w.endtx().clear());
r.events_txstopped.reset(); r.events_txstopped.reset();
@ -221,7 +221,7 @@ impl<'d, T: Instance> Write for UarteTx<'d, T> {
// TX is stopped almost instantly, spinning is fine. // TX is stopped almost instantly, spinning is fine.
while r.events_endtx.read().bits() == 0 {} while r.events_endtx.read().bits() == 0 {}
info!("write drop: stopped"); trace!("write drop: stopped");
}); });
r.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) }); r.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
@ -255,12 +255,12 @@ impl<'d, T: Instance> Write for UarteTx<'d, T> {
impl<'a, T: Instance> Drop for UarteTx<'a, T> { impl<'a, T: Instance> Drop for UarteTx<'a, T> {
fn drop(&mut self) { fn drop(&mut self) {
info!("uarte tx drop"); trace!("uarte tx drop");
let r = T::regs(); let r = T::regs();
let did_stoptx = r.events_txstarted.read().bits() != 0; let did_stoptx = r.events_txstarted.read().bits() != 0;
info!("did_stoptx {}", did_stoptx); trace!("did_stoptx {}", did_stoptx);
// Wait for txstopped, if needed. // Wait for txstopped, if needed.
while did_stoptx && r.events_txstopped.read().bits() == 0 {} while did_stoptx && r.events_txstopped.read().bits() == 0 {}
@ -295,7 +295,7 @@ impl<'d, T: Instance> Read for UarteRx<'d, T> {
let s = T::state(); let s = T::state();
let drop = OnDrop::new(move || { let drop = OnDrop::new(move || {
info!("read drop: stopping"); trace!("read drop: stopping");
r.intenclr.write(|w| w.endrx().clear()); r.intenclr.write(|w| w.endrx().clear());
r.events_rxto.reset(); r.events_rxto.reset();
@ -303,7 +303,7 @@ impl<'d, T: Instance> Read for UarteRx<'d, T> {
while r.events_endrx.read().bits() == 0 {} while r.events_endrx.read().bits() == 0 {}
info!("read drop: stopped"); trace!("read drop: stopped");
}); });
r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) }); r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
@ -337,12 +337,12 @@ impl<'d, T: Instance> Read for UarteRx<'d, T> {
impl<'a, T: Instance> Drop for UarteRx<'a, T> { impl<'a, T: Instance> Drop for UarteRx<'a, T> {
fn drop(&mut self) { fn drop(&mut self) {
info!("uarte rx drop"); trace!("uarte rx drop");
let r = T::regs(); let r = T::regs();
let did_stoprx = r.events_rxstarted.read().bits() != 0; let did_stoprx = r.events_rxstarted.read().bits() != 0;
info!("did_stoprx {}", did_stoprx); trace!("did_stoprx {}", did_stoprx);
// Wait for rxto, if needed. // Wait for rxto, if needed.
while did_stoprx && r.events_rxto.read().bits() == 0 {} while did_stoprx && r.events_rxto.read().bits() == 0 {}
@ -417,7 +417,7 @@ pub(in crate) fn drop_tx_rx(r: &pac::uarte0::RegisterBlock, s: &sealed::State) {
gpio::deconfigure_pin(r.psel.rts.read().bits()); gpio::deconfigure_pin(r.psel.rts.read().bits());
gpio::deconfigure_pin(r.psel.cts.read().bits()); gpio::deconfigure_pin(r.psel.cts.read().bits());
info!("uarte tx and rx drop: done"); trace!("uarte tx and rx drop: done");
} }
} }
@ -512,7 +512,7 @@ impl<'d, U: Instance, T: TimerInstance> ReadUntilIdle for UarteWithIdle<'d, U, T
let s = U::state(); let s = U::state();
let drop = OnDrop::new(|| { let drop = OnDrop::new(|| {
info!("read drop: stopping"); trace!("read drop: stopping");
self.timer.stop(); self.timer.stop();
@ -522,7 +522,7 @@ impl<'d, U: Instance, T: TimerInstance> ReadUntilIdle for UarteWithIdle<'d, U, T
while r.events_endrx.read().bits() == 0 {} while r.events_endrx.read().bits() == 0 {}
info!("read drop: stopped"); trace!("read drop: stopped");
}); });
r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) }); r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });