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nrf: rename UARTETWISPIn -> SERIALn

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The UARTETWISPIn naming is quite horrible. With the nRF53, Nordic realized this
and renamed the interrupts to SERIALn. Let's copy that for our peripheral names, in nrf53 and nrf91.
This commit is contained in:
Dario Nieuwenhuis 2023-02-21 22:41:23 +01:00
parent b05cd77a62
commit ada3d5be7c
4 changed files with 58 additions and 58 deletions
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48
embassy-nrf/src/chips/nrf5340_app.rs
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@ -231,10 +231,10 @@ embassy_hal_common::peripherals! {
NVMC, NVMC,
// UARTE, TWI & SPI // UARTE, TWI & SPI
UARTETWISPI0, SERIAL0,
UARTETWISPI1, SERIAL1,
UARTETWISPI2, SERIAL2,
UARTETWISPI3, SERIAL3,
// SAADC // SAADC
SAADC, SAADC,
@ -359,30 +359,30 @@ embassy_hal_common::peripherals! {
#[cfg(feature = "nightly")] #[cfg(feature = "nightly")]
impl_usb!(USBD, USBD, USBD); impl_usb!(USBD, USBD, USBD);
impl_uarte!(UARTETWISPI0, UARTE0, SERIAL0); impl_uarte!(SERIAL0, UARTE0, SERIAL0);
impl_uarte!(UARTETWISPI1, UARTE1, SERIAL1); impl_uarte!(SERIAL1, UARTE1, SERIAL1);
impl_uarte!(UARTETWISPI2, UARTE2, SERIAL2); impl_uarte!(SERIAL2, UARTE2, SERIAL2);
impl_uarte!(UARTETWISPI3, UARTE3, SERIAL3); impl_uarte!(SERIAL3, UARTE3, SERIAL3);
impl_spim!(UARTETWISPI0, SPIM0, SERIAL0); impl_spim!(SERIAL0, SPIM0, SERIAL0);
impl_spim!(UARTETWISPI1, SPIM1, SERIAL1); impl_spim!(SERIAL1, SPIM1, SERIAL1);
impl_spim!(UARTETWISPI2, SPIM2, SERIAL2); impl_spim!(SERIAL2, SPIM2, SERIAL2);
impl_spim!(UARTETWISPI3, SPIM3, SERIAL3); impl_spim!(SERIAL3, SPIM3, SERIAL3);
impl_spis!(UARTETWISPI0, SPIS0, SERIAL0); impl_spis!(SERIAL0, SPIS0, SERIAL0);
impl_spis!(UARTETWISPI1, SPIS1, SERIAL1); impl_spis!(SERIAL1, SPIS1, SERIAL1);
impl_spis!(UARTETWISPI2, SPIS2, SERIAL2); impl_spis!(SERIAL2, SPIS2, SERIAL2);
impl_spis!(UARTETWISPI3, SPIS3, SERIAL3); impl_spis!(SERIAL3, SPIS3, SERIAL3);
impl_twim!(UARTETWISPI0, TWIM0, SERIAL0); impl_twim!(SERIAL0, TWIM0, SERIAL0);
impl_twim!(UARTETWISPI1, TWIM1, SERIAL1); impl_twim!(SERIAL1, TWIM1, SERIAL1);
impl_twim!(UARTETWISPI2, TWIM2, SERIAL2); impl_twim!(SERIAL2, TWIM2, SERIAL2);
impl_twim!(UARTETWISPI3, TWIM3, SERIAL3); impl_twim!(SERIAL3, TWIM3, SERIAL3);
impl_twis!(UARTETWISPI0, TWIS0, SERIAL0); impl_twis!(SERIAL0, TWIS0, SERIAL0);
impl_twis!(UARTETWISPI1, TWIS1, SERIAL1); impl_twis!(SERIAL1, TWIS1, SERIAL1);
impl_twis!(UARTETWISPI2, TWIS2, SERIAL2); impl_twis!(SERIAL2, TWIS2, SERIAL2);
impl_twis!(UARTETWISPI3, TWIS3, SERIAL3); impl_twis!(SERIAL3, TWIS3, SERIAL3);
impl_pwm!(PWM0, PWM0, PWM0); impl_pwm!(PWM0, PWM0, PWM0);
impl_pwm!(PWM1, PWM1, PWM1); impl_pwm!(PWM1, PWM1, PWM1);

18
embassy-nrf/src/chips/nrf5340_net.rs
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@ -119,10 +119,10 @@ embassy_hal_common::peripherals! {
NVMC, NVMC,
// UARTE, TWI & SPI // UARTE, TWI & SPI
UARTETWISPI0, SERIAL0,
UARTETWISPI1, SERIAL1,
UARTETWISPI2, SERIAL2,
UARTETWISPI3, SERIAL3,
// SAADC // SAADC
SAADC, SAADC,
@ -242,11 +242,11 @@ embassy_hal_common::peripherals! {
P1_15, P1_15,
} }
impl_uarte!(UARTETWISPI0, UARTE0, SERIAL0); impl_uarte!(SERIAL0, UARTE0, SERIAL0);
impl_spim!(UARTETWISPI0, SPIM0, SERIAL0); impl_spim!(SERIAL0, SPIM0, SERIAL0);
impl_spis!(UARTETWISPI0, SPIS0, SERIAL0); impl_spis!(SERIAL0, SPIS0, SERIAL0);
impl_twim!(UARTETWISPI0, TWIM0, SERIAL0); impl_twim!(SERIAL0, TWIM0, SERIAL0);
impl_twis!(UARTETWISPI0, TWIS0, SERIAL0); impl_twis!(SERIAL0, TWIS0, SERIAL0);
impl_timer!(TIMER0, TIMER0, TIMER0); impl_timer!(TIMER0, TIMER0, TIMER0);
impl_timer!(TIMER1, TIMER1, TIMER1); impl_timer!(TIMER1, TIMER1, TIMER1);

48
embassy-nrf/src/chips/nrf9160.rs
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@ -179,10 +179,10 @@ embassy_hal_common::peripherals! {
NVMC, NVMC,
// UARTE, TWI & SPI // UARTE, TWI & SPI
UARTETWISPI0, SERIAL0,
UARTETWISPI1, SERIAL1,
UARTETWISPI2, SERIAL2,
UARTETWISPI3, SERIAL3,
// SAADC // SAADC
SAADC, SAADC,
@ -271,30 +271,30 @@ embassy_hal_common::peripherals! {
PDM, PDM,
} }
impl_uarte!(UARTETWISPI0, UARTE0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); impl_uarte!(SERIAL0, UARTE0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_uarte!(UARTETWISPI1, UARTE1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); impl_uarte!(SERIAL1, UARTE1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_uarte!(UARTETWISPI2, UARTE2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); impl_uarte!(SERIAL2, UARTE2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_uarte!(UARTETWISPI3, UARTE3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); impl_uarte!(SERIAL3, UARTE3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_spim!(UARTETWISPI0, SPIM0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); impl_spim!(SERIAL0, SPIM0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_spim!(UARTETWISPI1, SPIM1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); impl_spim!(SERIAL1, SPIM1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_spim!(UARTETWISPI2, SPIM2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); impl_spim!(SERIAL2, SPIM2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_spim!(UARTETWISPI3, SPIM3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); impl_spim!(SERIAL3, SPIM3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_spis!(UARTETWISPI0, SPIS0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); impl_spis!(SERIAL0, SPIS0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_spis!(UARTETWISPI1, SPIS1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); impl_spis!(SERIAL1, SPIS1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_spis!(UARTETWISPI2, SPIS2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); impl_spis!(SERIAL2, SPIS2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_spis!(UARTETWISPI3, SPIS3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); impl_spis!(SERIAL3, SPIS3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_twim!(UARTETWISPI0, TWIM0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); impl_twim!(SERIAL0, TWIM0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_twim!(UARTETWISPI1, TWIM1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); impl_twim!(SERIAL1, TWIM1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_twim!(UARTETWISPI2, TWIM2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); impl_twim!(SERIAL2, TWIM2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_twim!(UARTETWISPI3, TWIM3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); impl_twim!(SERIAL3, TWIM3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_twis!(UARTETWISPI0, TWIS0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); impl_twis!(SERIAL0, TWIS0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_twis!(UARTETWISPI1, TWIS1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); impl_twis!(SERIAL1, TWIS1, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_twis!(UARTETWISPI2, TWIS2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); impl_twis!(SERIAL2, TWIS2, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_twis!(UARTETWISPI3, TWIS3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); impl_twis!(SERIAL3, TWIS3, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_pwm!(PWM0, PWM0, PWM0); impl_pwm!(PWM0, PWM0, PWM0);
impl_pwm!(PWM1, PWM1, PWM1); impl_pwm!(PWM1, PWM1, PWM1);

2
examples/nrf5340/src/bin/uart.rs
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@ -15,7 +15,7 @@ async fn main(_spawner: Spawner) {
config.baudrate = uarte::Baudrate::BAUD115200; config.baudrate = uarte::Baudrate::BAUD115200;
let irq = interrupt::take!(SERIAL0); let irq = interrupt::take!(SERIAL0);
let mut uart = uarte::Uarte::new(p.UARTETWISPI0, irq, p.P1_00, p.P1_01, config); let mut uart = uarte::Uarte::new(p.SERIAL0, irq, p.P1_00, p.P1_01, config);
info!("uarte initialized!"); info!("uarte initialized!");