diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index 3fdc10ab..c73c6c7e 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -80,6 +80,8 @@ jobs: features: stm32l053r8,defmt - package: examples/stm32f4 target: thumbv7em-none-eabi + - package: examples/stm32l4 + target: thumbv7em-none-eabi steps: - uses: actions/checkout@v2 diff --git a/examples/stm32l4/.cargo/config.toml b/examples/stm32l4/.cargo/config.toml new file mode 100644 index 00000000..19ea6f56 --- /dev/null +++ b/examples/stm32l4/.cargo/config.toml @@ -0,0 +1,21 @@ +[unstable] +build-std = ["core"] + +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# replace STM32F429ZITx with your chip as listed in `probe-run --list-chips` +runner = "probe-run --chip STM32L4S5VI" + +rustflags = [ + # LLD (shipped with the Rust toolchain) is used as the default linker + "-C", "link-arg=--nmagic", + "-C", "link-arg=-Tlink.x", + "-C", "link-arg=-Tdefmt.x", + + # Code-size optimizations. + "-Z", "trap-unreachable=no", + "-C", "inline-threshold=5", + "-C", "no-vectorize-loops", +] + +[build] +target = "thumbv7em-none-eabi" diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml new file mode 100644 index 00000000..ca53f08b --- /dev/null +++ b/examples/stm32l4/Cargo.toml @@ -0,0 +1,35 @@ +[package] +authors = ["Dario Nieuwenhuis "] +edition = "2018" +name = "embassy-stm32f4-examples" +version = "0.1.0" +resolver = "2" + +[features] +default = [ + "defmt-default", +] +defmt-default = [] +defmt-trace = [] +defmt-debug = [] +defmt-info = [] +defmt-warn = [] +defmt-error = [] + +[dependencies] +embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt", "defmt-trace"] } +embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "stm32l4s5vi"] } +embassy-extras = {version = "0.1.0", path = "../../embassy-extras" } +stm32l4 = { version = "0.13", features = ["stm32l4x5" ] } + +defmt = "0.2.0" +defmt-rtt = "0.2.0" + +cortex-m = "0.7.1" +cortex-m-rt = "0.6.14" +embedded-hal = { version = "0.2.4" } +panic-probe = { version = "0.2.0", features= ["print-defmt"] } +futures = { version = "0.3.8", default-features = false, features = ["async-await"] } +rtt-target = { version = "0.3", features = ["cortex-m"] } +heapless = { version = "0.7.1", default-features = false } diff --git a/examples/stm32l4/build.rs b/examples/stm32l4/build.rs new file mode 100644 index 00000000..d534cc3d --- /dev/null +++ b/examples/stm32l4/build.rs @@ -0,0 +1,31 @@ +//! This build script copies the `memory.x` file from the crate root into +//! a directory where the linker can always find it at build time. +//! For many projects this is optional, as the linker always searches the +//! project root directory -- wherever `Cargo.toml` is. However, if you +//! are using a workspace or have a more complicated build setup, this +//! build script becomes required. Additionally, by requesting that +//! Cargo re-run the build script whenever `memory.x` is changed, +//! updating `memory.x` ensures a rebuild of the application with the +//! new memory settings. + +use std::env; +use std::fs::File; +use std::io::Write; +use std::path::PathBuf; + +fn main() { + // Put `memory.x` in our output directory and ensure it's + // on the linker search path. + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + File::create(out.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + + // By default, Cargo will re-run a build script whenever + // any file in the project changes. By specifying `memory.x` + // here, we ensure the build script is only re-run when + // `memory.x` is changed. + println!("cargo:rerun-if-changed=memory.x"); +} diff --git a/examples/stm32l4/memory.x b/examples/stm32l4/memory.x new file mode 100644 index 00000000..eb87d1b5 --- /dev/null +++ b/examples/stm32l4/memory.x @@ -0,0 +1,7 @@ +MEMORY +{ + /* NOTE 1 K = 1 KiBi = 1024 bytes */ + /* These values correspond to the STM32L4S5 */ + FLASH : ORIGIN = 0x08000000, LENGTH = 1024K + RAM : ORIGIN = 0x20000000, LENGTH = 128K +} diff --git a/examples/stm32l4/src/bin/blinky.rs b/examples/stm32l4/src/bin/blinky.rs new file mode 100644 index 00000000..42c9333f --- /dev/null +++ b/examples/stm32l4/src/bin/blinky.rs @@ -0,0 +1,53 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] +#![allow(incomplete_features)] + +#[path = "../example_common.rs"] +mod example_common; +use embassy_stm32::gpio::{Level, Output}; +use embedded_hal::digital::v2::OutputPin; +use example_common::*; + +use cortex_m_rt::entry; +use stm32l4::stm32l4x5 as pac; + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let pp = pac::Peripherals::take().unwrap(); + + pp.DBGMCU.cr.modify(|_, w| { + w.dbg_sleep().set_bit(); + w.dbg_standby().set_bit(); + w.dbg_stop().set_bit() + }); + + pp.RCC.ahb2enr.modify(|_, w| { + w.gpioaen().set_bit(); + w.gpioben().set_bit(); + w.gpiocen().set_bit(); + w.gpioden().set_bit(); + w.gpioeen().set_bit(); + w.gpiofen().set_bit(); + w + }); + + let p = embassy_stm32::init(Default::default()); + + let mut led = Output::new(p.PB14, Level::High); + + loop { + info!("high"); + led.set_high().unwrap(); + cortex_m::asm::delay(10_000_000); + + info!("low"); + led.set_low().unwrap(); + cortex_m::asm::delay(10_000_000); + } +} diff --git a/examples/stm32l4/src/bin/button.rs b/examples/stm32l4/src/bin/button.rs new file mode 100644 index 00000000..43d81715 --- /dev/null +++ b/examples/stm32l4/src/bin/button.rs @@ -0,0 +1,58 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] +#![allow(incomplete_features)] + +#[path = "../example_common.rs"] +mod example_common; +use embassy_stm32::gpio::{Input, Level, Output, Pull}; +use embedded_hal::digital::v2::{InputPin, OutputPin}; +use example_common::*; + +use cortex_m_rt::entry; +use stm32l4::stm32l4x5 as pac; + + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let pp = pac::Peripherals::take().unwrap(); + + pp.DBGMCU.cr.modify(|_, w| { + w.dbg_sleep().set_bit(); + w.dbg_standby().set_bit(); + w.dbg_stop().set_bit() + }); + + pp.RCC.ahb2enr.modify(|_, w| { + w.gpioaen().set_bit(); + w.gpioben().set_bit(); + w.gpiocen().set_bit(); + w.gpioden().set_bit(); + w.gpioeen().set_bit(); + w.gpiofen().set_bit(); + w + }); + + let p = embassy_stm32::init(Default::default()); + + let button = Input::new(p.PC13, Pull::Up); + let mut led1 = Output::new(p.PA5, Level::High); + let mut led2 = Output::new(p.PB14, Level::High); + + loop { + if button.is_high().unwrap() { + info!("high"); + led1.set_high().unwrap(); + led2.set_low().unwrap(); + } else { + info!("low"); + led1.set_low().unwrap(); + led2.set_high().unwrap(); + } + } +} diff --git a/examples/stm32l4/src/bin/button_exti.rs b/examples/stm32l4/src/bin/button_exti.rs new file mode 100644 index 00000000..caace835 --- /dev/null +++ b/examples/stm32l4/src/bin/button_exti.rs @@ -0,0 +1,84 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] +#![allow(incomplete_features)] + +#[path = "../example_common.rs"] +mod example_common; +use embassy::executor::Executor; +use embassy::time::Clock; +use embassy::util::Forever; +use embassy_stm32::exti::ExtiInput; +use embassy_stm32::gpio::{Input, Pull}; +use embassy_traits::gpio::{WaitForFallingEdge, WaitForRisingEdge}; +use example_common::*; + +use cortex_m_rt::entry; +use stm32l4::stm32l4x5 as pac; + +#[embassy::task] +async fn main_task() { + let p = embassy_stm32::init(Default::default()); + + let button = Input::new(p.PC13, Pull::Up); + let mut button = ExtiInput::new(button, p.EXTI13); + + info!("Press the USER button..."); + + loop { + button.wait_for_falling_edge().await; + info!("Pressed!"); + button.wait_for_rising_edge().await; + info!("Released!"); + } +} + +struct ZeroClock; + +impl Clock for ZeroClock { + fn now(&self) -> u64 { + 0 + } +} + +static EXECUTOR: Forever = Forever::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let pp = pac::Peripherals::take().unwrap(); + + pp.DBGMCU.cr.modify(|_, w| { + w.dbg_sleep().set_bit(); + w.dbg_standby().set_bit(); + w.dbg_stop().set_bit() + }); + + pp.RCC.ahb2enr.modify(|_, w| { + w.gpioaen().set_bit(); + w.gpioben().set_bit(); + w.gpiocen().set_bit(); + w.gpioden().set_bit(); + w.gpioeen().set_bit(); + w.gpiofen().set_bit(); + w + }); + + pp.RCC.apb2enr.modify(|_, w| { + w.syscfgen().set_bit(); + w + }); + + unsafe { embassy::time::set_clock(&ZeroClock) }; + + let executor = EXECUTOR.put(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task())); + }) + +} diff --git a/examples/stm32l4/src/bin/spi.rs b/examples/stm32l4/src/bin/spi.rs new file mode 100644 index 00000000..9db854dc --- /dev/null +++ b/examples/stm32l4/src/bin/spi.rs @@ -0,0 +1,65 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] +#![allow(incomplete_features)] + +#[path = "../example_common.rs"] +mod example_common; + +use embassy_stm32::gpio::{Level, Output}; +use embedded_hal::digital::v2::OutputPin; +use example_common::*; + +use cortex_m_rt::entry; +use embassy_stm32::spi::{Config, Spi}; +use embassy_stm32::time::Hertz; +use embedded_hal::blocking::spi::Transfer; +use stm32l4::stm32l4x5 as pac; + +#[entry] +fn main() -> ! { + info!("Hello World, dude!"); + + let pp = pac::Peripherals::take().unwrap(); + + pp.DBGMCU.cr.modify(|_, w| { + w.dbg_sleep().set_bit(); + w.dbg_standby().set_bit(); + w.dbg_stop().set_bit() + }); + + pp.RCC.ahb2enr.modify(|_, w| { + w.gpioaen().set_bit(); + w.gpioben().set_bit(); + w.gpiocen().set_bit(); + w.gpioden().set_bit(); + w.gpioeen().set_bit(); + w.gpiofen().set_bit(); + w + }); + + let p = embassy_stm32::init(Default::default()); + + let mut spi = Spi::new( + Hertz(16_000_000), + p.SPI3, + p.PC10, + p.PC12, + p.PC11, + Hertz(1_000_000), + Config::default(), + ); + + let mut cs = Output::new(p.PE0, Level::High); + + loop { + let mut buf = [0x0A; 4]; + unwrap!(cs.set_low()); + unwrap!(spi.transfer(&mut buf)); + unwrap!(cs.set_high()); + info!("xfer {=[u8]:x}", buf); + } +} diff --git a/examples/stm32l4/src/example_common.rs b/examples/stm32l4/src/example_common.rs new file mode 100644 index 00000000..54d63383 --- /dev/null +++ b/examples/stm32l4/src/example_common.rs @@ -0,0 +1,17 @@ +#![macro_use] + +use defmt_rtt as _; // global logger +use panic_probe as _; + +pub use defmt::*; + +use core::sync::atomic::{AtomicUsize, Ordering}; + +defmt::timestamp! {"{=u64}", { + static COUNT: AtomicUsize = AtomicUsize::new(0); + // NOTE(no-CAS) `timestamps` runs with interrupts disabled + let n = COUNT.load(Ordering::Relaxed); + COUNT.store(n + 1, Ordering::Relaxed); + n as u64 + } +}