remove use of embedded-hal SPI traits. Instead just call our bus trait directly and push responsibility for implementing CS on the trait implementor

This commit is contained in:
kbleeke
2023-03-21 19:15:54 +01:00
parent a6a2a035d5
commit b4b8d82980
6 changed files with 59 additions and 178 deletions

View File

@ -47,8 +47,6 @@ futures = { version = "0.3.17", default-features = false, features = [
pio-proc = "0.2"
pio = "0.2.1"
embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" }
embedded-hal-async = { version = "0.2.0-alpha.0" }
embedded-io = { version = "0.4.0", features = ["async", "defmt"] }
heapless = "0.7.15"

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@ -1,4 +1,4 @@
#![no_std]
#![no_std]
#![no_main]
#![feature(type_alias_impl_trait)]
#![feature(async_fn_in_trait)]
@ -6,7 +6,7 @@
mod pio;
use core::convert::Infallible;
use core::slice;
use core::str::from_utf8;
use defmt::*;
@ -16,8 +16,6 @@ use embassy_net::{Config, Stack, StackResources};
use embassy_rp::gpio::{Flex, Level, Output};
use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_24, PIN_25, PIN_29};
use embassy_rp::pio::{Pio0, PioPeripherial, PioStateMachineInstance, Sm0};
use embedded_hal_1::spi::ErrorType;
use embedded_hal_async::spi::{ExclusiveDevice, SpiBusFlush, SpiBusRead, SpiBusWrite};
use embedded_io::asynch::Write;
use static_cell::StaticCell;
use {defmt_rtt as _, panic_probe as _};
@ -37,7 +35,7 @@ async fn wifi_task(
runner: cyw43::Runner<
'static,
Output<'static, PIN_23>,
ExclusiveDevice<PioSpi<PioStateMachineInstance<Pio0, Sm0>, DMA_CH0>, Output<'static, PIN_25>>,
PioSpi<PIN_25, PioStateMachineInstance<Pio0, Sm0>, DMA_CH0>,
>,
) -> ! {
runner.run().await
@ -75,8 +73,7 @@ async fn main(spawner: Spawner) {
let (_, sm, _, _, _) = p.PIO0.split();
let dma = p.DMA_CH0;
let bus = PioSpi::new(sm, p.PIN_24, p.PIN_29, dma);
let spi = ExclusiveDevice::new(bus, cs);
let spi = PioSpi::new(sm, cs, p.PIN_24, p.PIN_29, dma);
let state = singleton!(cyw43::State::new());
let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await;
@ -146,7 +143,6 @@ async fn main(spawner: Spawner) {
info!("rxd {}", from_utf8(&buf[..n]).unwrap());
match socket.write_all(&buf[..n]).await {
Ok(()) => {}
Err(e) => {
@ -168,31 +164,13 @@ struct MySpi {
/// - IRQ
/// - strap to set to gSPI mode on boot.
dio: Flex<'static, PIN_24>,
/// Chip select
cs: Output<'static, PIN_25>,
}
impl ErrorType for MySpi {
type Error = Infallible;
}
impl cyw43::SpiBusCyw43<u32> for MySpi {
async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> {
self.write(write).await
}
async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> {
self.write(write).await?;
self.read(read).await
}
}
impl SpiBusFlush for MySpi {
async fn flush(&mut self) -> Result<(), Self::Error> {
Ok(())
}
}
impl SpiBusRead<u32> for MySpi {
async fn read(&mut self, words: &mut [u32]) -> Result<(), Self::Error> {
impl MySpi {
async fn read(&mut self, words: &mut [u32]) {
self.dio.set_as_input();
for word in words {
let mut w = 0;
@ -210,13 +188,9 @@ impl SpiBusRead<u32> for MySpi {
}
*word = w
}
Ok(())
}
}
impl SpiBusWrite<u32> for MySpi {
async fn write(&mut self, words: &[u32]) -> Result<(), Self::Error> {
async fn write(&mut self, words: &[u32]) {
self.dio.set_as_output();
for word in words {
let mut word = *word;
@ -238,6 +212,20 @@ impl SpiBusWrite<u32> for MySpi {
self.clk.set_low();
self.dio.set_as_input();
Ok(())
}
}
impl cyw43::SpiBusCyw43 for MySpi {
async fn cmd_write(&mut self, write: &[u32]) {
self.cs.set_low();
self.write(write).await;
self.cs.set_high();
}
async fn cmd_read(&mut self, write: u32, read: &mut [u32]) {
self.cs.set_low();
self.write(slice::from_ref(&write)).await;
self.read(read).await;
self.cs.set_high();
}
}

View File

@ -2,34 +2,27 @@ use core::slice;
use cyw43::SpiBusCyw43;
use embassy_rp::dma::Channel;
use embassy_rp::gpio::{Drive, Pin, Pull, SlewRate};
use embassy_rp::gpio::{Drive, Output, Pin, Pull, SlewRate};
use embassy_rp::pio::{PioStateMachine, ShiftDirection};
use embassy_rp::relocate::RelocatedProgram;
use embassy_rp::{pio_instr_util, Peripheral};
use embedded_hal_1::spi::ErrorType;
use embedded_hal_async::spi::SpiBusFlush;
use pio::Wrap;
use pio_proc::pio_asm;
pub struct PioSpi<SM, DMA> {
// cs: Output<'static, AnyPin>,
pub struct PioSpi<CS: Pin, SM, DMA> {
cs: Output<'static, CS>,
sm: SM,
dma: DMA,
wrap_target: u8,
}
impl<SM, DMA> PioSpi<SM, DMA>
impl<CS, SM, DMA> PioSpi<CS, SM, DMA>
where
SM: PioStateMachine,
DMA: Channel,
CS: Pin,
{
pub fn new<DIO, CLK>(
mut sm: SM,
// cs: AnyPin,
dio: DIO,
clk: CLK,
dma: DMA,
) -> Self
pub fn new<DIO, CLK>(mut sm: SM, cs: Output<'static, CS>, dio: DIO, clk: CLK, dma: DMA) -> Self
where
DIO: Pin,
CLK: Pin,
@ -105,7 +98,7 @@ where
pio_instr_util::set_pin(&mut sm, 0);
Self {
// cs: Output::new(cs, Level::High),
cs,
sm,
dma,
wrap_target: target,
@ -156,43 +149,21 @@ where
}
}
#[derive(Debug)]
pub enum PioError {}
impl embedded_hal_async::spi::Error for PioError {
fn kind(&self) -> embedded_hal_1::spi::ErrorKind {
embedded_hal_1::spi::ErrorKind::Other
}
}
impl<SM, DMA> ErrorType for PioSpi<SM, DMA>
where
SM: PioStateMachine,
{
type Error = PioError;
}
impl<SM, DMA> SpiBusFlush for PioSpi<SM, DMA>
where
SM: PioStateMachine,
{
async fn flush(&mut self) -> Result<(), Self::Error> {
Ok(())
}
}
impl<SM, DMA> SpiBusCyw43<u32> for PioSpi<SM, DMA>
impl<CS, SM, DMA> SpiBusCyw43 for PioSpi<CS, SM, DMA>
where
CS: Pin,
SM: PioStateMachine,
DMA: Channel,
{
async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> {
async fn cmd_write(&mut self, write: & [u32]) {
self.cs.set_low();
self.write(write).await;
Ok(())
self.cs.set_high();
}
async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> {
self.cmd_read(write[0], read).await;
Ok(())
async fn cmd_read(&mut self, write: u32, read: & mut [u32]) {
self.cs.set_low();
self.cmd_read(write, read).await;
self.cs.set_high();
}
}