remove use of embedded-hal SPI traits. Instead just call our bus trait directly and push responsibility for implementing CS on the trait implementor
This commit is contained in:
@ -47,8 +47,6 @@ futures = { version = "0.3.17", default-features = false, features = [
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pio-proc = "0.2"
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pio = "0.2.1"
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embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" }
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embedded-hal-async = { version = "0.2.0-alpha.0" }
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embedded-io = { version = "0.4.0", features = ["async", "defmt"] }
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heapless = "0.7.15"
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@ -1,4 +1,4 @@
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#![no_std]
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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#![feature(async_fn_in_trait)]
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@ -6,7 +6,7 @@
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mod pio;
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use core::convert::Infallible;
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use core::slice;
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use core::str::from_utf8;
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use defmt::*;
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@ -16,8 +16,6 @@ use embassy_net::{Config, Stack, StackResources};
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use embassy_rp::gpio::{Flex, Level, Output};
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use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_24, PIN_25, PIN_29};
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use embassy_rp::pio::{Pio0, PioPeripherial, PioStateMachineInstance, Sm0};
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use embedded_hal_1::spi::ErrorType;
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use embedded_hal_async::spi::{ExclusiveDevice, SpiBusFlush, SpiBusRead, SpiBusWrite};
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use embedded_io::asynch::Write;
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use static_cell::StaticCell;
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use {defmt_rtt as _, panic_probe as _};
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@ -37,7 +35,7 @@ async fn wifi_task(
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runner: cyw43::Runner<
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'static,
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Output<'static, PIN_23>,
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ExclusiveDevice<PioSpi<PioStateMachineInstance<Pio0, Sm0>, DMA_CH0>, Output<'static, PIN_25>>,
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PioSpi<PIN_25, PioStateMachineInstance<Pio0, Sm0>, DMA_CH0>,
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>,
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) -> ! {
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runner.run().await
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@ -75,8 +73,7 @@ async fn main(spawner: Spawner) {
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let (_, sm, _, _, _) = p.PIO0.split();
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let dma = p.DMA_CH0;
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let bus = PioSpi::new(sm, p.PIN_24, p.PIN_29, dma);
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let spi = ExclusiveDevice::new(bus, cs);
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let spi = PioSpi::new(sm, cs, p.PIN_24, p.PIN_29, dma);
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let state = singleton!(cyw43::State::new());
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let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await;
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@ -146,7 +143,6 @@ async fn main(spawner: Spawner) {
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info!("rxd {}", from_utf8(&buf[..n]).unwrap());
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match socket.write_all(&buf[..n]).await {
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Ok(()) => {}
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Err(e) => {
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@ -168,31 +164,13 @@ struct MySpi {
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/// - IRQ
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/// - strap to set to gSPI mode on boot.
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dio: Flex<'static, PIN_24>,
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/// Chip select
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cs: Output<'static, PIN_25>,
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}
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impl ErrorType for MySpi {
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type Error = Infallible;
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}
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impl cyw43::SpiBusCyw43<u32> for MySpi {
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async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> {
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self.write(write).await
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}
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async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> {
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self.write(write).await?;
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self.read(read).await
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}
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}
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impl SpiBusFlush for MySpi {
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async fn flush(&mut self) -> Result<(), Self::Error> {
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Ok(())
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}
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}
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impl SpiBusRead<u32> for MySpi {
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async fn read(&mut self, words: &mut [u32]) -> Result<(), Self::Error> {
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impl MySpi {
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async fn read(&mut self, words: &mut [u32]) {
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self.dio.set_as_input();
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for word in words {
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let mut w = 0;
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@ -210,13 +188,9 @@ impl SpiBusRead<u32> for MySpi {
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}
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*word = w
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}
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Ok(())
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}
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}
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impl SpiBusWrite<u32> for MySpi {
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async fn write(&mut self, words: &[u32]) -> Result<(), Self::Error> {
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async fn write(&mut self, words: &[u32]) {
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self.dio.set_as_output();
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for word in words {
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let mut word = *word;
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@ -238,6 +212,20 @@ impl SpiBusWrite<u32> for MySpi {
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self.clk.set_low();
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self.dio.set_as_input();
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Ok(())
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}
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}
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impl cyw43::SpiBusCyw43 for MySpi {
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async fn cmd_write(&mut self, write: &[u32]) {
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self.cs.set_low();
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self.write(write).await;
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self.cs.set_high();
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}
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async fn cmd_read(&mut self, write: u32, read: &mut [u32]) {
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self.cs.set_low();
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self.write(slice::from_ref(&write)).await;
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self.read(read).await;
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self.cs.set_high();
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}
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}
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@ -2,34 +2,27 @@ use core::slice;
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use cyw43::SpiBusCyw43;
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use embassy_rp::dma::Channel;
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use embassy_rp::gpio::{Drive, Pin, Pull, SlewRate};
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use embassy_rp::gpio::{Drive, Output, Pin, Pull, SlewRate};
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use embassy_rp::pio::{PioStateMachine, ShiftDirection};
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use embassy_rp::relocate::RelocatedProgram;
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use embassy_rp::{pio_instr_util, Peripheral};
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use embedded_hal_1::spi::ErrorType;
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use embedded_hal_async::spi::SpiBusFlush;
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use pio::Wrap;
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use pio_proc::pio_asm;
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pub struct PioSpi<SM, DMA> {
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// cs: Output<'static, AnyPin>,
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pub struct PioSpi<CS: Pin, SM, DMA> {
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cs: Output<'static, CS>,
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sm: SM,
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dma: DMA,
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wrap_target: u8,
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}
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impl<SM, DMA> PioSpi<SM, DMA>
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impl<CS, SM, DMA> PioSpi<CS, SM, DMA>
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where
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SM: PioStateMachine,
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DMA: Channel,
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CS: Pin,
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{
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pub fn new<DIO, CLK>(
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mut sm: SM,
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// cs: AnyPin,
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dio: DIO,
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clk: CLK,
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dma: DMA,
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) -> Self
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pub fn new<DIO, CLK>(mut sm: SM, cs: Output<'static, CS>, dio: DIO, clk: CLK, dma: DMA) -> Self
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where
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DIO: Pin,
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CLK: Pin,
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@ -105,7 +98,7 @@ where
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pio_instr_util::set_pin(&mut sm, 0);
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Self {
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// cs: Output::new(cs, Level::High),
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cs,
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sm,
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dma,
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wrap_target: target,
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@ -156,43 +149,21 @@ where
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}
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}
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#[derive(Debug)]
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pub enum PioError {}
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impl embedded_hal_async::spi::Error for PioError {
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fn kind(&self) -> embedded_hal_1::spi::ErrorKind {
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embedded_hal_1::spi::ErrorKind::Other
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}
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}
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impl<SM, DMA> ErrorType for PioSpi<SM, DMA>
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where
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SM: PioStateMachine,
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{
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type Error = PioError;
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}
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impl<SM, DMA> SpiBusFlush for PioSpi<SM, DMA>
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where
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SM: PioStateMachine,
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{
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async fn flush(&mut self) -> Result<(), Self::Error> {
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Ok(())
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}
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}
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impl<SM, DMA> SpiBusCyw43<u32> for PioSpi<SM, DMA>
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impl<CS, SM, DMA> SpiBusCyw43 for PioSpi<CS, SM, DMA>
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where
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CS: Pin,
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SM: PioStateMachine,
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DMA: Channel,
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{
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async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> {
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async fn cmd_write(&mut self, write: & [u32]) {
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self.cs.set_low();
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self.write(write).await;
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Ok(())
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self.cs.set_high();
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}
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async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> {
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self.cmd_read(write[0], read).await;
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Ok(())
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async fn cmd_read(&mut self, write: u32, read: & mut [u32]) {
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self.cs.set_low();
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self.cmd_read(write, read).await;
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self.cs.set_high();
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}
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}
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