From b4f96e192cd8c86f437e1d155388a860dcd3e1fd Mon Sep 17 00:00:00 2001 From: Peter Gibson Date: Sun, 18 Jun 2023 08:45:58 +1000 Subject: [PATCH] Don't read data register to clear flags on usart v3 ^& v4 --- embassy-stm32/src/usart/buffered.rs | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 530760bd..086196a2 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -21,8 +21,10 @@ impl interrupt::typelevel::Handler for Interrupt // RX unsafe { let sr = sr(r).read(); - // Reading DR clears the rxne, error and idle interrupt flags on v1. - let dr = if sr.ore() || sr.idle() || sr.rxne() { + // On v1 & v2, reading DR clears the rxne, error and idle interrupt + // flags. Keep this close to the SR read to reduce the chance of a + // flag being set in-between. + let dr = if sr.rxne() || cfg!(any(usart_v1, usart_v2)) && (sr.ore() || sr.idle()) { Some(rdr(r).read_volatile()) } else { None