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Get rid of some warnings

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This commit is contained in:
Thales Fragoso
2021-02-13 21:41:36 -03:00
parent a7797a918d
commit b69f72e055
40 changed files with 194 additions and 228 deletions
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13
embassy-nrf/src/buffered_uarte.rs
View File

@ -20,10 +20,7 @@ use crate::interrupt::{self, OwnedInterrupt};
use crate::pac;
use crate::util::peripheral::{PeripheralMutex, PeripheralState};
use crate::util::ring_buffer::RingBuffer;
use crate::{
fmt::{panic, todo, *},
util::low_power_wait_until,
};
use crate::{fmt::*, util::low_power_wait_until};
// Re-export SVD variants to allow user to directly set values
pub use crate::hal::uarte::Pins;
@ -257,7 +254,7 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
// We have data ready in buffer? Return it.
let buf = state.rx.pop_buf();
if buf.len() != 0 {
if !buf.is_empty() {
trace!(" got {:?} {:?}", buf.as_ptr() as u32, buf.len());
let buf: &[u8] = buf;
let buf: &[u8] = unsafe { mem::transmute(buf) };
@ -287,7 +284,7 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
trace!("poll_write: {:?}", buf.len());
let tx_buf = state.tx.push_buf();
if tx_buf.len() == 0 {
if tx_buf.is_empty() {
trace!("poll_write: pending");
state.tx_waker.register(cx.waker());
return Poll::Pending;
@ -343,7 +340,7 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
trace!(" irq_rx: in state idle");
let buf = self.rx.push_buf();
if buf.len() != 0 {
if !buf.is_empty() {
trace!(" irq_rx: starting {:?}", buf.len());
self.rx_state = RxState::Receiving;
@ -394,7 +391,7 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
TxState::Idle => {
trace!(" irq_tx: in state Idle");
let buf = self.tx.pop_buf();
if buf.len() != 0 {
if !buf.is_empty() {
trace!(" irq_tx: starting {:?}", buf.len());
self.tx_state = TxState::Transmitting(buf.len());

1
embassy-nrf/src/fmt.rs
View File

@ -1,4 +1,5 @@
#![macro_use]
#![allow(clippy::module_inception)]
#[cfg(all(feature = "defmt", feature = "log"))]
compile_error!("You may not enable both `defmt` and `log` features.");

9
embassy-nrf/src/gpiote.rs
View File

@ -7,7 +7,6 @@ use core::task::{Context, Poll};
use embassy::gpio::{WaitForHigh, WaitForLow};
use embassy::util::Signal;
use crate::fmt::{panic, *};
use crate::hal::gpio::{Input, Level, Output, Pin as GpioPin, Port};
use crate::interrupt;
use crate::interrupt::OwnedInterrupt;
@ -141,10 +140,10 @@ impl Gpiote {
unsafe fn on_irq(_ctx: *mut ()) {
let g = &*GPIOTE::ptr();
for i in 0..8 {
if g.events_in[i].read().bits() != 0 {
g.events_in[i].write(|w| w);
CHANNEL_SIGNALS[i].signal(());
for (event_in, signal) in g.events_in.iter().zip(CHANNEL_SIGNALS.iter()) {
if event_in.read().bits() != 0 {
event_in.write(|w| w);
signal.signal(());
}
}

110
embassy-nrf/src/qspi.rs
View File

@ -1,9 +1,9 @@
use crate::fmt::{assert, assert_eq, panic, *};
use crate::fmt::{assert, assert_eq, *};
use core::future::Future;
use crate::hal::gpio::{Output, Pin as GpioPin, Port as GpioPort, PushPull};
use crate::interrupt::{OwnedInterrupt, QSPIInterrupt};
use crate::pac::{Interrupt, QSPI};
use crate::pac::QSPI;
pub use crate::pac::qspi::ifconfig0::ADDRMODE_A as AddressMode;
pub use crate::pac::qspi::ifconfig0::PPSIZE_A as WritePageSize;
@ -156,7 +156,7 @@ impl Qspi {
pub fn sleep(&mut self) {
info!("flash: sleeping");
info!("flash: state = {:?}", self.inner.status.read().bits());
self.inner.ifconfig1.modify(|r, w| w.dpmen().enter());
self.inner.ifconfig1.modify(|_, w| w.dpmen().enter());
info!("flash: state = {:?}", self.inner.status.read().bits());
cortex_m::asm::delay(1000000);
info!("flash: state = {:?}", self.inner.status.read().bits());
@ -166,68 +166,66 @@ impl Qspi {
.write(|w| w.tasks_deactivate().set_bit());
}
pub fn custom_instruction<'a>(
pub async fn custom_instruction<'a>(
&'a mut self,
opcode: u8,
req: &'a [u8],
resp: &'a mut [u8],
) -> impl Future<Output = Result<(), Error>> + 'a {
async move {
let bomb = DropBomb::new();
) -> Result<(), Error> {
let bomb = DropBomb::new();
assert!(req.len() <= 8);
assert!(resp.len() <= 8);
assert!(req.len() <= 8);
assert!(resp.len() <= 8);
let mut dat0: u32 = 0;
let mut dat1: u32 = 0;
let mut dat0: u32 = 0;
let mut dat1: u32 = 0;
for i in 0..4 {
if i < req.len() {
dat0 |= (req[i] as u32) << (i * 8);
}
for i in 0..4 {
if i < req.len() {
dat0 |= (req[i] as u32) << (i * 8);
}
for i in 0..4 {
if i + 4 < req.len() {
dat1 |= (req[i + 4] as u32) << (i * 8);
}
}
let len = core::cmp::max(req.len(), resp.len()) as u8;
self.inner.cinstrdat0.write(|w| unsafe { w.bits(dat0) });
self.inner.cinstrdat1.write(|w| unsafe { w.bits(dat1) });
self.inner.events_ready.reset();
self.inner.cinstrconf.write(|w| {
let w = unsafe { w.opcode().bits(opcode) };
let w = unsafe { w.length().bits(len + 1) };
let w = w.lio2().bit(true);
let w = w.lio3().bit(true);
let w = w.wipwait().bit(true);
let w = w.wren().bit(true);
let w = w.lfen().bit(false);
let w = w.lfstop().bit(false);
w
});
SIGNAL.wait().await;
let dat0 = self.inner.cinstrdat0.read().bits();
let dat1 = self.inner.cinstrdat1.read().bits();
for i in 0..4 {
if i < resp.len() {
resp[i] = (dat0 >> (i * 8)) as u8;
}
}
for i in 0..4 {
if i + 4 < resp.len() {
resp[i] = (dat1 >> (i * 8)) as u8;
}
}
bomb.defuse();
Ok(())
}
for i in 0..4 {
if i + 4 < req.len() {
dat1 |= (req[i + 4] as u32) << (i * 8);
}
}
let len = core::cmp::max(req.len(), resp.len()) as u8;
self.inner.cinstrdat0.write(|w| unsafe { w.bits(dat0) });
self.inner.cinstrdat1.write(|w| unsafe { w.bits(dat1) });
self.inner.events_ready.reset();
self.inner.cinstrconf.write(|w| {
let w = unsafe { w.opcode().bits(opcode) };
let w = unsafe { w.length().bits(len + 1) };
let w = w.lio2().bit(true);
let w = w.lio3().bit(true);
let w = w.wipwait().bit(true);
let w = w.wren().bit(true);
let w = w.lfen().bit(false);
let w = w.lfstop().bit(false);
w
});
SIGNAL.wait().await;
let dat0 = self.inner.cinstrdat0.read().bits();
let dat1 = self.inner.cinstrdat1.read().bits();
for i in 0..4 {
if i < resp.len() {
resp[i] = (dat0 >> (i * 8)) as u8;
}
}
for i in 0..4 {
if i + 4 < resp.len() {
resp[i] = (dat1 >> (i * 8)) as u8;
}
}
bomb.defuse();
Ok(())
}
}

6
embassy-nrf/src/rtc.rs
View File

@ -4,7 +4,6 @@ use core::sync::atomic::{AtomicU32, Ordering};
use embassy::time::Clock;
use crate::fmt::*;
use crate::interrupt;
use crate::interrupt::{CriticalSection, Mutex, OwnedInterrupt};
use crate::pac::rtc0;
@ -19,6 +18,7 @@ fn compare_n(n: usize) -> u32 {
1 << (n + 16)
}
#[cfg(tests)]
mod test {
use super::*;
@ -159,7 +159,9 @@ impl<T: Instance> RTC<T> {
alarm.timestamp.set(u64::MAX);
// Call after clearing alarm, so the callback can set another alarm.
alarm.callback.get().map(|(f, ctx)| f(ctx));
if let Some((f, ctx)) = alarm.callback.get() {
f(ctx);
}
}
fn set_alarm_callback(&self, n: usize, callback: fn(*mut ()), ctx: *mut ()) {

2
embassy-nrf/src/util/peripheral.rs
View File

@ -68,7 +68,7 @@ impl<S: PeripheralState> PeripheralMutex<S> {
impl<S: PeripheralState> Drop for PeripheralMutex<S> {
fn drop(&mut self) {
if let Some((state, irq)) = &mut self.inner {
if let Some((_state, irq)) = &mut self.inner {
irq.disable();
irq.remove_handler();
}

2
embassy-nrf/src/util/ring_buffer.rs
View File

@ -1,4 +1,4 @@
use crate::fmt::{assert, panic, todo, *};
use crate::fmt::{assert, *};
pub struct RingBuffer<'a> {
buf: &'a mut [u8],