Merge pull request #1595 from embassy-rs/probe-rs

Update probe-rs-cli -> probe-rs
This commit is contained in:
Dario Nieuwenhuis 2023-06-29 00:43:44 +00:00 committed by GitHub
commit b95e5a4ea6
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GPG Key ID: 4AEE18F83AFDEB23
45 changed files with 88 additions and 88 deletions

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@ -6,16 +6,16 @@
"rust-analyzer.check.allTargets": false, "rust-analyzer.check.allTargets": false,
"rust-analyzer.check.noDefaultFeatures": true, "rust-analyzer.check.noDefaultFeatures": true,
"rust-analyzer.cargo.noDefaultFeatures": true, "rust-analyzer.cargo.noDefaultFeatures": true,
"rust-analyzer.cargo.target": "thumbv7em-none-eabi", "rust-analyzer.cargo.target": "thumbv7m-none-eabi",
//"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf", //"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf",
"rust-analyzer.cargo.features": [ "rust-analyzer.cargo.features": [
"nightly", ///"nightly",
], ],
"rust-analyzer.linkedProjects": [ "rust-analyzer.linkedProjects": [
// Declare for the target you wish to develop // Declare for the target you wish to develop
// "embassy-executor/Cargo.toml", // "embassy-executor/Cargo.toml",
// "embassy-sync/Cargo.toml", // "embassy-sync/Cargo.toml",
"examples/nrf52840/Cargo.toml", "examples/stm32wl/Cargo.toml",
// "examples/nrf5340/Cargo.toml", // "examples/nrf5340/Cargo.toml",
// "examples/nrf-rtos-trace/Cargo.toml", // "examples/nrf-rtos-trace/Cargo.toml",
// "examples/rp/Cargo.toml", // "examples/rp/Cargo.toml",

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@ -1,6 +1,6 @@
# cyw43 # cyw43
WIP driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. Implementation based on [Infineon/wifi-host-driver](https://github.com/Infineon/wifi-host-driver). Rust driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. Implementation based on [Infineon/wifi-host-driver](https://github.com/Infineon/wifi-host-driver).
## Current status ## Current status
@ -19,18 +19,18 @@ Working:
TODO: TODO:
- Setting a custom MAC address. - Setting a custom MAC address.
- Bus sleep (unclear what the benefit is. Is it needed for IRQs? or is it just power consumption optimization?) - Bus sleep (for power consumption optimization)
## Running the examples ## Running the examples
- `cargo install probe-rs-cli` - `cargo install probe-rs --features cli`
- `cd examples/rpi-pico-w` - `cd examples/rp`
### Example 1: Scan the wifi stations ### Example 1: Scan the wifi stations
- `cargo run --release --bin wifi_scan` - `cargo run --release --bin wifi_scan`
### Example 2: Create an access point (IP and credentials in the code) ### Example 2: Create an access point (IP and credentials in the code)
- `cargo run --release --bin tcp_server_ap` - `cargo run --release --bin wifi_ap_tcp_server`
### Example 3: Connect to an existing network and create a server ### Example 3: Connect to an existing network and create a server
- `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release` - `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release --bin wifi_tcp_server`
After a few seconds, you should see that DHCP picks up an IP address like this After a few seconds, you should see that DHCP picks up an IP address like this
``` ```

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@ -410,13 +410,13 @@ pub fn init(config: config::Config) -> Peripherals {
warn!( warn!(
"You have requested enabling chip reset functionality on the reset pin, by not enabling the Cargo feature `reset-pin-as-gpio`.\n\ "You have requested enabling chip reset functionality on the reset pin, by not enabling the Cargo feature `reset-pin-as-gpio`.\n\
However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\ However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
To fix this, erase UICR manually, for example using `probe-rs-cli erase` or `nrfjprog --eraseuicr`." To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
); );
#[cfg(feature = "reset-pin-as-gpio")] #[cfg(feature = "reset-pin-as-gpio")]
warn!( warn!(
"You have requested using the reset pin as GPIO, by enabling the Cargo feature `reset-pin-as-gpio`.\n\ "You have requested using the reset pin as GPIO, by enabling the Cargo feature `reset-pin-as-gpio`.\n\
However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\ However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
To fix this, erase UICR manually, for example using `probe-rs-cli erase` or `nrfjprog --eraseuicr`." To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
); );
} }
} }
@ -432,7 +432,7 @@ pub fn init(config: config::Config) -> Peripherals {
warn!( warn!(
"You have requested to use P0.09 and P0.10 pins for NFC, by not enabling the Cargo feature `nfc-pins-as-gpio`.\n\ "You have requested to use P0.09 and P0.10 pins for NFC, by not enabling the Cargo feature `nfc-pins-as-gpio`.\n\
However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\ However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
To fix this, erase UICR manually, for example using `probe-rs-cli erase` or `nrfjprog --eraseuicr`." To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
); );
} }
} }

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list` # replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip nRF52840_xxAA" runner = "probe-rs run --chip nRF52840_xxAA"
[build] [build]
target = "thumbv7em-none-eabi" target = "thumbv7em-none-eabi"

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@ -3,7 +3,7 @@ build-std = ["core"]
build-std-features = ["panic_immediate_abort"] build-std-features = ["panic_immediate_abort"]
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
runner = "probe-rs-cli run --chip RP2040" runner = "probe-rs run --chip RP2040"
[build] [build]
target = "thumbv6m-none-eabi" target = "thumbv6m-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list` # replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32F303VCTx" runner = "probe-rs run --chip STM32F303VCTx"
[build] [build]
target = "thumbv7em-none-eabihf" target = "thumbv7em-none-eabihf"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list` # replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32F767ZITx" runner = "probe-rs run --chip STM32F767ZITx"
[build] [build]
target = "thumbv7em-none-eabihf" target = "thumbv7em-none-eabihf"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list` # replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32H743ZITx" runner = "probe-rs run --chip STM32H743ZITx"
[build] [build]
target = "thumbv7em-none-eabihf" target = "thumbv7em-none-eabihf"

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@ -1,5 +1,5 @@
#!/bin/bash #!/bin/bash
probe-rs-cli erase --chip STM32H743ZITx probe-rs erase --chip STM32H743ZITx
mv ../../bootloader/stm32/memory.x ../../bootloader/stm32/memory-old.x mv ../../bootloader/stm32/memory.x ../../bootloader/stm32/memory-old.x
cp memory-bl.x ../../bootloader/stm32/memory.x cp memory-bl.x ../../bootloader/stm32/memory.x

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list` # replace your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32L072CZTx" runner = "probe-rs run --chip STM32L072CZTx"
[build] [build]
target = "thumbv6m-none-eabi" target = "thumbv6m-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list` # replace your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32L151CBxxA" runner = "probe-rs run --chip STM32L151CBxxA"
[build] [build]
target = "thumbv7m-none-eabi" target = "thumbv7m-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list` # replace your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32L475VG" runner = "probe-rs run --chip STM32L475VG"
[build] [build]
target = "thumbv7em-none-eabihf" target = "thumbv7em-none-eabihf"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list` # replace your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32WLE5JCIx" runner = "probe-rs run --chip STM32WLE5JCIx"
[build] [build]
target = "thumbv7em-none-eabihf" target = "thumbv7em-none-eabihf"

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@ -4,7 +4,7 @@ build-std-features = ["panic_immediate_abort"]
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
#runner = "./fruitrunner" #runner = "./fruitrunner"
runner = "probe-rs-cli run --chip nrf52840_xxAA" runner = "probe-rs run --chip nrf52840_xxAA"
rustflags = [ rustflags = [
# Code-size optimizations. # Code-size optimizations.

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@ -1,5 +1,5 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
runner = "probe-rs-cli run --chip RP2040" runner = "probe-rs run --chip RP2040"
[build] [build]
target = "thumbv6m-none-eabi" target = "thumbv6m-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list` # replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip nRF52840_xxAA" runner = "probe-rs run --chip nRF52840_xxAA"
[build] [build]
target = "thumbv7em-none-eabi" target = "thumbv7em-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list` # replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip nRF52840_xxAA" runner = "probe-rs run --chip nRF52840_xxAA"
[build] [build]
target = "thumbv7em-none-eabi" target = "thumbv7em-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list` # replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip nRF52840_xxAA" runner = "probe-rs run --chip nRF52840_xxAA"
[build] [build]
target = "thumbv7em-none-eabi" target = "thumbv7em-none-eabi"

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@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) {
let p = embassy_nrf::init(Default::default()); let p = embassy_nrf::init(Default::default());
info!("Hello NVMC!"); info!("Hello NVMC!");
// probe-rs-cli run breaks without this, I'm not sure why. // probe-rs run breaks without this, I'm not sure why.
Timer::after(Duration::from_secs(1)).await; Timer::after(Duration::from_secs(1)).await;
let mut f = Nvmc::new(p.NVMC); let mut f = Nvmc::new(p.NVMC);

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@ -16,7 +16,7 @@ async fn main(_spawner: Spawner) {
let mut config = Config::default(); let mut config = Config::default();
config.timeout_ticks = 32768 * 3; // 3 seconds config.timeout_ticks = 32768 * 3; // 3 seconds
// This is needed for `probe-rs-cli run` to be able to catch the panic message // This is needed for `probe-rs run` to be able to catch the panic message
// in the WDT interrupt. The core resets 2 ticks after firing the interrupt. // in the WDT interrupt. The core resets 2 ticks after firing the interrupt.
config.run_during_debug_halt = false; config.run_during_debug_halt = false;

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF5340_xxAA with your chip as listed in `probe-rs-cli chip list` # replace nRF5340_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip nRF5340_xxAA" runner = "probe-rs run --chip nRF5340_xxAA"
[build] [build]
target = "thumbv8m.main-none-eabihf" target = "thumbv8m.main-none-eabihf"

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@ -1,5 +1,5 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
runner = "probe-rs-cli run --chip RP2040" runner = "probe-rs run --chip RP2040"
[build] [build]
target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+

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@ -42,8 +42,8 @@ async fn main(spawner: Spawner) {
// To make flashing faster for development, you may want to flash the firmwares independently // To make flashing faster for development, you may want to flash the firmwares independently
// at hardcoded addresses, instead of baking them into the program with `include_bytes!`: // at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };

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@ -27,8 +27,8 @@ async fn main(spawner: Spawner) {
// To make flashing faster for development, you may want to flash the firmwares independently // To make flashing faster for development, you may want to flash the firmwares independently
// at hardcoded addresses, instead of baking them into the program with `include_bytes!`: // at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };

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@ -39,8 +39,8 @@ async fn main(spawner: Spawner) {
// To make flashing faster for development, you may want to flash the firmwares independently // To make flashing faster for development, you may want to flash the firmwares independently
// at hardcoded addresses, instead of baking them into the program with `include_bytes!`: // at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };

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@ -42,8 +42,8 @@ async fn main(spawner: Spawner) {
// To make flashing faster for development, you may want to flash the firmwares independently // To make flashing faster for development, you may want to flash the firmwares independently
// at hardcoded addresses, instead of baking them into the program with `include_bytes!`: // at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32G071C8Rx with your chip as listed in `probe-rs-cli chip list` # replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --speed 100 --chip STM32c031c6tx" runner = "probe-rs run --speed 100 --chip STM32c031c6tx"
[build] [build]
target = "thumbv6m-none-eabi" target = "thumbv6m-none-eabi"

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@ -1,5 +1,5 @@
[target.thumbv6m-none-eabi] [target.thumbv6m-none-eabi]
runner = 'probe-rs-cli run --chip STM32F091RCTX' runner = 'probe-rs run --chip STM32F091RCTX'
[build] [build]
target = "thumbv6m-none-eabi" target = "thumbv6m-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F103C8 with your chip as listed in `probe-rs-cli chip list` # replace STM32F103C8 with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32F103C8" runner = "probe-rs run --chip STM32F103C8"
[build] [build]
target = "thumbv7m-none-eabi" target = "thumbv7m-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F207ZGTx with your chip as listed in `probe-rs-cli chip list` # replace STM32F207ZGTx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32F207ZGTx" runner = "probe-rs run --chip STM32F207ZGTx"
[build] [build]
target = "thumbv7m-none-eabi" target = "thumbv7m-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list` # replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32F303ZETx" runner = "probe-rs run --chip STM32F303ZETx"
[build] [build]
target = "thumbv7em-none-eabihf" target = "thumbv7em-none-eabihf"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list` # replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32F429ZITx" runner = "probe-rs run --chip STM32F429ZITx"
[build] [build]
target = "thumbv7em-none-eabi" target = "thumbv7em-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list` # replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32F767ZITx" runner = "probe-rs run --chip STM32F767ZITx"
[build] [build]
target = "thumbv7em-none-eabihf" target = "thumbv7em-none-eabihf"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32G071C8Rx with your chip as listed in `probe-rs-cli chip list` # replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32G071RBTx" runner = "probe-rs run --chip STM32G071RBTx"
[build] [build]
target = "thumbv6m-none-eabi" target = "thumbv6m-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32G071C8Rx with your chip as listed in `probe-rs-cli chip list` # replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32G484VETx" runner = "probe-rs run --chip STM32G484VETx"
[build] [build]
target = "thumbv7em-none-eabi" target = "thumbv7em-none-eabi"

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@ -1,5 +1,5 @@
[target.thumbv8m.main-none-eabihf] [target.thumbv8m.main-none-eabihf]
runner = 'probe-rs-cli run --chip STM32H563ZITx' runner = 'probe-rs run --chip STM32H563ZITx'
[build] [build]
target = "thumbv8m.main-none-eabihf" target = "thumbv8m.main-none-eabihf"

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@ -1,5 +1,5 @@
[target.thumbv7em-none-eabihf] [target.thumbv7em-none-eabihf]
runner = 'probe-rs-cli run --chip STM32H743ZITx' runner = 'probe-rs run --chip STM32H743ZITx'
[build] [build]
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list` # replace your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32L053R8Tx" runner = "probe-rs run --chip STM32L053R8Tx"
[build] [build]
target = "thumbv6m-none-eabi" target = "thumbv6m-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list` # replace your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32L151CBxxA" runner = "probe-rs run --chip STM32L151CBxxA"
[build] [build]
target = "thumbv7m-none-eabi" target = "thumbv7m-none-eabi"

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@ -1,8 +1,8 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list` # replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
#runner = "probe-rs-cli run --chip STM32L475VGT6" #runner = "probe-rs run --chip STM32L475VGT6"
#runner = "probe-rs-cli run --chip STM32L475VG" #runner = "probe-rs run --chip STM32L475VG"
runner = "probe-rs-cli run --chip STM32L4S5VI" runner = "probe-rs run --chip STM32L4S5VI"
[build] [build]
target = "thumbv7em-none-eabi" target = "thumbv7em-none-eabi"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32L552ZETxQ with your chip as listed in `probe-rs-cli chip list` # replace STM32L552ZETxQ with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32L552ZETxQ" runner = "probe-rs run --chip STM32L552ZETxQ"
[build] [build]
target = "thumbv8m.main-none-eabihf" target = "thumbv8m.main-none-eabihf"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32U585AIIx with your chip as listed in `probe-rs-cli chip list` # replace STM32U585AIIx with your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32U585AIIx" runner = "probe-rs run --chip STM32U585AIIx"
[build] [build]
target = "thumbv8m.main-none-eabihf" target = "thumbv8m.main-none-eabihf"

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32WB55CCUx with your chip as listed in `probe-rs-cli chip list` # replace STM32WB55CCUx with your chip as listed in `probe-rs chip list`
# runner = "probe-rs-cli run --chip STM32WB55RGVx --speed 1000 --connect-under-reset" # runner = "probe-rs run --chip STM32WB55RGVx --speed 1000 --connect-under-reset"
runner = "teleprobe local run --chip STM32WB55RG --elf" runner = "teleprobe local run --chip STM32WB55RG --elf"
[build] [build]

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@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list` # replace your chip as listed in `probe-rs chip list`
runner = "probe-rs-cli run --chip STM32WLE5JCIx" runner = "probe-rs run --chip STM32WLE5JCIx"
[build] [build]
target = "thumbv7em-none-eabihf" target = "thumbv7em-none-eabihf"

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@ -44,8 +44,8 @@ async fn main(spawner: Spawner) {
} }
// cyw43 firmware needs to be flashed manually: // cyw43 firmware needs to be flashed manually:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x101c0000 // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x101c0000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x101f8000 // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x101f8000
let fw = unsafe { core::slice::from_raw_parts(0x101c0000 as *const u8, 224190) }; let fw = unsafe { core::slice::from_raw_parts(0x101c0000 as *const u8, 224190) };
let clm = unsafe { core::slice::from_raw_parts(0x101f8000 as *const u8, 4752) }; let clm = unsafe { core::slice::from_raw_parts(0x101f8000 as *const u8, 4752) };