stm32/dma: rename ringbuf

This commit is contained in:
xoviat 2023-07-29 19:25:18 -05:00
parent fcbfd224a7
commit bae31ebce7
4 changed files with 26 additions and 26 deletions

View File

@ -9,7 +9,7 @@ use atomic_polyfill::AtomicUsize;
use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
use embassy_sync::waitqueue::AtomicWaker; use embassy_sync::waitqueue::AtomicWaker;
use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError}; use super::ringbuffer::{DmaCtrl, OverrunError, ReadableDmaRingBuffer};
use super::word::{Word, WordSize}; use super::word::{Word, WordSize};
use super::Dir; use super::Dir;
use crate::_generated::BDMA_CHANNEL_COUNT; use crate::_generated::BDMA_CHANNEL_COUNT;
@ -395,13 +395,13 @@ impl<'a, C: Channel> DmaCtrl for DmaCtrlImpl<'a, C> {
} }
} }
pub struct RingBuffer<'a, C: Channel, W: Word> { pub struct ReadableRingBuffer<'a, C: Channel, W: Word> {
cr: regs::Cr, cr: regs::Cr,
channel: PeripheralRef<'a, C>, channel: PeripheralRef<'a, C>,
ringbuf: DmaRingBuffer<'a, W>, ringbuf: ReadableDmaRingBuffer<'a, W>,
} }
impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> {
pub unsafe fn new_read( pub unsafe fn new_read(
channel: impl Peripheral<P = C> + 'a, channel: impl Peripheral<P = C> + 'a,
_request: Request, _request: Request,
@ -442,7 +442,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
let mut this = Self { let mut this = Self {
channel, channel,
cr: w, cr: w,
ringbuf: DmaRingBuffer::new(buffer), ringbuf: ReadableDmaRingBuffer::new(buffer),
}; };
this.clear_irqs(); this.clear_irqs();
@ -475,7 +475,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
self.ringbuf.read(DmaCtrlImpl(self.channel.reborrow()), buf) self.ringbuf.read(DmaCtrlImpl(self.channel.reborrow()), buf)
} }
/// Read an exact number of elements from the ringbuffer. /// Read an exact number of elements from the ReadableRingBuffer.
/// ///
/// Returns the remaining number of elements available for immediate reading. /// Returns the remaining number of elements available for immediate reading.
/// OverrunError is returned if the portion to be read was overwritten by the DMA controller. /// OverrunError is returned if the portion to be read was overwritten by the DMA controller.
@ -513,7 +513,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
.await .await
} }
/// The capacity of the ringbuffer /// The capacity of the ReadableRingBuffer
pub fn cap(&self) -> usize { pub fn cap(&self) -> usize {
self.ringbuf.cap() self.ringbuf.cap()
} }
@ -550,7 +550,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
} }
} }
impl<'a, C: Channel, W: Word> Drop for RingBuffer<'a, C, W> { impl<'a, C: Channel, W: Word> Drop for ReadableRingBuffer<'a, C, W> {
fn drop(&mut self) { fn drop(&mut self) {
self.request_stop(); self.request_stop();
while self.is_running() {} while self.is_running() {}

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@ -7,7 +7,7 @@ use core::task::{Context, Poll, Waker};
use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
use embassy_sync::waitqueue::AtomicWaker; use embassy_sync::waitqueue::AtomicWaker;
use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError}; use super::ringbuffer::{DmaCtrl, OverrunError, ReadableDmaRingBuffer};
use super::word::{Word, WordSize}; use super::word::{Word, WordSize};
use super::Dir; use super::Dir;
use crate::_generated::DMA_CHANNEL_COUNT; use crate::_generated::DMA_CHANNEL_COUNT;
@ -625,13 +625,13 @@ impl<'a, C: Channel> DmaCtrl for DmaCtrlImpl<'a, C> {
} }
} }
pub struct RingBuffer<'a, C: Channel, W: Word> { pub struct ReadableRingBuffer<'a, C: Channel, W: Word> {
cr: regs::Cr, cr: regs::Cr,
channel: PeripheralRef<'a, C>, channel: PeripheralRef<'a, C>,
ringbuf: DmaRingBuffer<'a, W>, ringbuf: ReadableDmaRingBuffer<'a, W>,
} }
impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> {
pub unsafe fn new_read( pub unsafe fn new_read(
channel: impl Peripheral<P = C> + 'a, channel: impl Peripheral<P = C> + 'a,
_request: Request, _request: Request,
@ -677,7 +677,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
let mut this = Self { let mut this = Self {
channel, channel,
cr: w, cr: w,
ringbuf: DmaRingBuffer::new(buffer), ringbuf: ReadableDmaRingBuffer::new(buffer),
}; };
this.clear_irqs(); this.clear_irqs();
@ -797,7 +797,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
} }
} }
impl<'a, C: Channel, W: Word> Drop for RingBuffer<'a, C, W> { impl<'a, C: Channel, W: Word> Drop for ReadableRingBuffer<'a, C, W> {
fn drop(&mut self) { fn drop(&mut self) {
self.request_stop(); self.request_stop();
while self.is_running() {} while self.is_running() {}

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@ -29,7 +29,7 @@ use super::word::Word;
/// | | | | /// | | | |
/// +- end --------------------+ +- start ----------------+ /// +- end --------------------+ +- start ----------------+
/// ``` /// ```
pub struct DmaRingBuffer<'a, W: Word> { pub struct ReadableDmaRingBuffer<'a, W: Word> {
pub(crate) dma_buf: &'a mut [W], pub(crate) dma_buf: &'a mut [W],
start: usize, start: usize,
} }
@ -51,7 +51,7 @@ pub trait DmaCtrl {
fn reset_complete_count(&mut self) -> usize; fn reset_complete_count(&mut self) -> usize;
} }
impl<'a, W: Word> DmaRingBuffer<'a, W> { impl<'a, W: Word> ReadableDmaRingBuffer<'a, W> {
pub fn new(dma_buf: &'a mut [W]) -> Self { pub fn new(dma_buf: &'a mut [W]) -> Self {
Self { dma_buf, start: 0 } Self { dma_buf, start: 0 }
} }
@ -263,7 +263,7 @@ mod tests {
#[test] #[test]
fn empty_and_read_not_started() { fn empty_and_read_not_started() {
let mut dma_buf = [0u8; 16]; let mut dma_buf = [0u8; 16];
let ringbuf = DmaRingBuffer::new(&mut dma_buf); let ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
assert_eq!(0, ringbuf.start); assert_eq!(0, ringbuf.start);
} }
@ -273,7 +273,7 @@ mod tests {
let mut dma = TestCircularTransfer::new(16); let mut dma = TestCircularTransfer::new(16);
let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
assert_eq!(0, ringbuf.start); assert_eq!(0, ringbuf.start);
assert_eq!(16, ringbuf.cap()); assert_eq!(16, ringbuf.cap());
@ -314,7 +314,7 @@ mod tests {
let mut dma = TestCircularTransfer::new(16); let mut dma = TestCircularTransfer::new(16);
let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
assert_eq!(0, ringbuf.start); assert_eq!(0, ringbuf.start);
assert_eq!(16, ringbuf.cap()); assert_eq!(16, ringbuf.cap());
@ -349,7 +349,7 @@ mod tests {
let mut dma = TestCircularTransfer::new(16); let mut dma = TestCircularTransfer::new(16);
let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
assert_eq!(0, ringbuf.start); assert_eq!(0, ringbuf.start);
assert_eq!(16, ringbuf.cap()); assert_eq!(16, ringbuf.cap());
@ -384,7 +384,7 @@ mod tests {
let mut dma = TestCircularTransfer::new(16); let mut dma = TestCircularTransfer::new(16);
let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
assert_eq!(0, ringbuf.start); assert_eq!(0, ringbuf.start);
assert_eq!(16, ringbuf.cap()); assert_eq!(16, ringbuf.cap());
@ -420,7 +420,7 @@ mod tests {
let mut dma = TestCircularTransfer::new(16); let mut dma = TestCircularTransfer::new(16);
let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
assert_eq!(0, ringbuf.start); assert_eq!(0, ringbuf.start);
assert_eq!(16, ringbuf.cap()); assert_eq!(16, ringbuf.cap());
@ -454,7 +454,7 @@ mod tests {
let mut dma = TestCircularTransfer::new(16); let mut dma = TestCircularTransfer::new(16);
let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
assert_eq!(0, ringbuf.start); assert_eq!(0, ringbuf.start);
assert_eq!(16, ringbuf.cap()); assert_eq!(16, ringbuf.cap());

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@ -6,12 +6,12 @@ use embassy_hal_internal::PeripheralRef;
use futures::future::{select, Either}; use futures::future::{select, Either};
use super::{clear_interrupt_flags, rdr, sr, BasicInstance, Error, UartRx}; use super::{clear_interrupt_flags, rdr, sr, BasicInstance, Error, UartRx};
use crate::dma::RingBuffer; use crate::dma::ReadableRingBuffer;
use crate::usart::{Regs, Sr}; use crate::usart::{Regs, Sr};
pub struct RingBufferedUartRx<'d, T: BasicInstance, RxDma: super::RxDma<T>> { pub struct RingBufferedUartRx<'d, T: BasicInstance, RxDma: super::RxDma<T>> {
_peri: PeripheralRef<'d, T>, _peri: PeripheralRef<'d, T>,
ring_buf: RingBuffer<'d, RxDma, u8>, ring_buf: ReadableRingBuffer<'d, RxDma, u8>,
} }
impl<'d, T: BasicInstance, RxDma: super::RxDma<T>> UartRx<'d, T, RxDma> { impl<'d, T: BasicInstance, RxDma: super::RxDma<T>> UartRx<'d, T, RxDma> {
@ -24,7 +24,7 @@ impl<'d, T: BasicInstance, RxDma: super::RxDma<T>> UartRx<'d, T, RxDma> {
let request = self.rx_dma.request(); let request = self.rx_dma.request();
let opts = Default::default(); let opts = Default::default();
let ring_buf = unsafe { RingBuffer::new_read(self.rx_dma, request, rdr(T::regs()), dma_buf, opts) }; let ring_buf = unsafe { ReadableRingBuffer::new_read(self.rx_dma, request, rdr(T::regs()), dma_buf, opts) };
RingBufferedUartRx { RingBufferedUartRx {
_peri: self._peri, _peri: self._peri,