stm32/dma: rename ringbuf
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fcbfd224a7
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bae31ebce7
@ -9,7 +9,7 @@ use atomic_polyfill::AtomicUsize;
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use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError};
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use super::ringbuffer::{DmaCtrl, OverrunError, ReadableDmaRingBuffer};
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use super::word::{Word, WordSize};
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use super::Dir;
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use crate::_generated::BDMA_CHANNEL_COUNT;
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@ -395,13 +395,13 @@ impl<'a, C: Channel> DmaCtrl for DmaCtrlImpl<'a, C> {
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}
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}
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pub struct RingBuffer<'a, C: Channel, W: Word> {
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pub struct ReadableRingBuffer<'a, C: Channel, W: Word> {
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cr: regs::Cr,
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channel: PeripheralRef<'a, C>,
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ringbuf: DmaRingBuffer<'a, W>,
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ringbuf: ReadableDmaRingBuffer<'a, W>,
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}
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impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
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impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> {
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pub unsafe fn new_read(
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channel: impl Peripheral<P = C> + 'a,
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_request: Request,
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@ -442,7 +442,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
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let mut this = Self {
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channel,
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cr: w,
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ringbuf: DmaRingBuffer::new(buffer),
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ringbuf: ReadableDmaRingBuffer::new(buffer),
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};
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this.clear_irqs();
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@ -475,7 +475,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
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self.ringbuf.read(DmaCtrlImpl(self.channel.reborrow()), buf)
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}
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/// Read an exact number of elements from the ringbuffer.
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/// Read an exact number of elements from the ReadableRingBuffer.
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///
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/// Returns the remaining number of elements available for immediate reading.
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/// OverrunError is returned if the portion to be read was overwritten by the DMA controller.
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@ -513,7 +513,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
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.await
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}
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/// The capacity of the ringbuffer
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/// The capacity of the ReadableRingBuffer
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pub fn cap(&self) -> usize {
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self.ringbuf.cap()
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}
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@ -550,7 +550,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
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}
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}
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impl<'a, C: Channel, W: Word> Drop for RingBuffer<'a, C, W> {
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impl<'a, C: Channel, W: Word> Drop for ReadableRingBuffer<'a, C, W> {
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fn drop(&mut self) {
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self.request_stop();
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while self.is_running() {}
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@ -7,7 +7,7 @@ use core::task::{Context, Poll, Waker};
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use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError};
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use super::ringbuffer::{DmaCtrl, OverrunError, ReadableDmaRingBuffer};
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use super::word::{Word, WordSize};
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use super::Dir;
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use crate::_generated::DMA_CHANNEL_COUNT;
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@ -625,13 +625,13 @@ impl<'a, C: Channel> DmaCtrl for DmaCtrlImpl<'a, C> {
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}
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}
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pub struct RingBuffer<'a, C: Channel, W: Word> {
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pub struct ReadableRingBuffer<'a, C: Channel, W: Word> {
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cr: regs::Cr,
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channel: PeripheralRef<'a, C>,
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ringbuf: DmaRingBuffer<'a, W>,
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ringbuf: ReadableDmaRingBuffer<'a, W>,
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}
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impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
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impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> {
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pub unsafe fn new_read(
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channel: impl Peripheral<P = C> + 'a,
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_request: Request,
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@ -677,7 +677,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
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let mut this = Self {
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channel,
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cr: w,
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ringbuf: DmaRingBuffer::new(buffer),
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ringbuf: ReadableDmaRingBuffer::new(buffer),
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};
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this.clear_irqs();
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@ -797,7 +797,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> {
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}
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}
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impl<'a, C: Channel, W: Word> Drop for RingBuffer<'a, C, W> {
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impl<'a, C: Channel, W: Word> Drop for ReadableRingBuffer<'a, C, W> {
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fn drop(&mut self) {
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self.request_stop();
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while self.is_running() {}
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@ -29,7 +29,7 @@ use super::word::Word;
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/// | | | |
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/// +- end --------------------+ +- start ----------------+
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/// ```
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pub struct DmaRingBuffer<'a, W: Word> {
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pub struct ReadableDmaRingBuffer<'a, W: Word> {
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pub(crate) dma_buf: &'a mut [W],
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start: usize,
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}
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@ -51,7 +51,7 @@ pub trait DmaCtrl {
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fn reset_complete_count(&mut self) -> usize;
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}
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impl<'a, W: Word> DmaRingBuffer<'a, W> {
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impl<'a, W: Word> ReadableDmaRingBuffer<'a, W> {
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pub fn new(dma_buf: &'a mut [W]) -> Self {
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Self { dma_buf, start: 0 }
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}
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@ -263,7 +263,7 @@ mod tests {
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#[test]
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fn empty_and_read_not_started() {
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let mut dma_buf = [0u8; 16];
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let ringbuf = DmaRingBuffer::new(&mut dma_buf);
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let ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
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assert_eq!(0, ringbuf.start);
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}
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@ -273,7 +273,7 @@ mod tests {
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let mut dma = TestCircularTransfer::new(16);
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let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
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let mut ringbuf = DmaRingBuffer::new(&mut dma_buf);
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let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
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assert_eq!(0, ringbuf.start);
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assert_eq!(16, ringbuf.cap());
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@ -314,7 +314,7 @@ mod tests {
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let mut dma = TestCircularTransfer::new(16);
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let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
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let mut ringbuf = DmaRingBuffer::new(&mut dma_buf);
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let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
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assert_eq!(0, ringbuf.start);
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assert_eq!(16, ringbuf.cap());
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@ -349,7 +349,7 @@ mod tests {
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let mut dma = TestCircularTransfer::new(16);
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let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
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let mut ringbuf = DmaRingBuffer::new(&mut dma_buf);
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let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
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assert_eq!(0, ringbuf.start);
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assert_eq!(16, ringbuf.cap());
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@ -384,7 +384,7 @@ mod tests {
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let mut dma = TestCircularTransfer::new(16);
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let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
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let mut ringbuf = DmaRingBuffer::new(&mut dma_buf);
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let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
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assert_eq!(0, ringbuf.start);
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assert_eq!(16, ringbuf.cap());
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@ -420,7 +420,7 @@ mod tests {
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let mut dma = TestCircularTransfer::new(16);
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let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
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let mut ringbuf = DmaRingBuffer::new(&mut dma_buf);
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let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
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assert_eq!(0, ringbuf.start);
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assert_eq!(16, ringbuf.cap());
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@ -454,7 +454,7 @@ mod tests {
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let mut dma = TestCircularTransfer::new(16);
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let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15
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let mut ringbuf = DmaRingBuffer::new(&mut dma_buf);
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let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf);
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assert_eq!(0, ringbuf.start);
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assert_eq!(16, ringbuf.cap());
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@ -6,12 +6,12 @@ use embassy_hal_internal::PeripheralRef;
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use futures::future::{select, Either};
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use super::{clear_interrupt_flags, rdr, sr, BasicInstance, Error, UartRx};
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use crate::dma::RingBuffer;
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use crate::dma::ReadableRingBuffer;
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use crate::usart::{Regs, Sr};
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pub struct RingBufferedUartRx<'d, T: BasicInstance, RxDma: super::RxDma<T>> {
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_peri: PeripheralRef<'d, T>,
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ring_buf: RingBuffer<'d, RxDma, u8>,
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ring_buf: ReadableRingBuffer<'d, RxDma, u8>,
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}
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impl<'d, T: BasicInstance, RxDma: super::RxDma<T>> UartRx<'d, T, RxDma> {
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@ -24,7 +24,7 @@ impl<'d, T: BasicInstance, RxDma: super::RxDma<T>> UartRx<'d, T, RxDma> {
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let request = self.rx_dma.request();
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let opts = Default::default();
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let ring_buf = unsafe { RingBuffer::new_read(self.rx_dma, request, rdr(T::regs()), dma_buf, opts) };
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let ring_buf = unsafe { ReadableRingBuffer::new_read(self.rx_dma, request, rdr(T::regs()), dma_buf, opts) };
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RingBufferedUartRx {
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_peri: self._peri,
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