adc_v3: replace cfg(stm32g0) + friends with cfg(adc_g0)
Since any MCU (not just STM32G0) using adc_g0 should probably be handled the same way.
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@ -33,7 +33,7 @@ pub struct Adc<'d, T: Instance> {
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pub(crate) mod sealed {
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pub trait Instance {
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fn regs() -> crate::pac::adc::Adc;
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#[cfg(not(any(adc_f1, adc_v1, adc_f3_v2)))]
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#[cfg(not(any(adc_f1, adc_v1, adc_f3_v2, adc_g0)))]
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fn common_regs() -> crate::pac::adccommon::AdcCommon;
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#[cfg(adc_f3)]
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fn frequency() -> crate::time::Hertz;
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@ -63,7 +63,7 @@ foreach_peripheral!(
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fn regs() -> crate::pac::adc::Adc {
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crate::pac::$inst
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}
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#[cfg(not(any(adc_f1, adc_v1, adc_f3_v2)))]
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#[cfg(not(any(adc_f1, adc_v1, adc_f3_v2, adc_g0)))]
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fn common_regs() -> crate::pac::adccommon::AdcCommon {
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foreach_peripheral!{
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(adccommon, $common_inst:ident) => {
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@ -26,9 +26,9 @@ pub struct VrefInt;
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impl<T: Instance> AdcPin<T> for VrefInt {}
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impl<T: Instance> super::sealed::AdcPin<T> for VrefInt {
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fn channel(&self) -> u8 {
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#[cfg(not(stm32g0))]
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#[cfg(not(adc_g0))]
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let val = 0;
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#[cfg(stm32g0)]
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#[cfg(adc_g0)]
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let val = 13;
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val
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}
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@ -38,9 +38,9 @@ pub struct Temperature;
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impl<T: Instance> AdcPin<T> for Temperature {}
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impl<T: Instance> super::sealed::AdcPin<T> for Temperature {
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fn channel(&self) -> u8 {
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#[cfg(not(stm32g0))]
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#[cfg(not(adc_g0))]
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let val = 17;
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#[cfg(stm32g0)]
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#[cfg(adc_g0)]
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let val = 12;
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val
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}
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@ -50,9 +50,9 @@ pub struct Vbat;
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impl<T: Instance> AdcPin<T> for Vbat {}
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impl<T: Instance> super::sealed::AdcPin<T> for Vbat {
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fn channel(&self) -> u8 {
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#[cfg(not(stm32g0))]
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#[cfg(not(adc_g0))]
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let val = 18;
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#[cfg(stm32g0)]
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#[cfg(adc_g0)]
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let val = 14;
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val
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}
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@ -92,9 +92,14 @@ impl<'d, T: Instance> Adc<'d, T> {
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}
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pub fn enable_vrefint(&self, delay: &mut impl DelayUs<u32>) -> VrefInt {
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#[cfg(not(adc_g0))]
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T::common_regs().ccr().modify(|reg| {
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reg.set_vrefen(true);
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});
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#[cfg(adc_g0)]
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T::regs().ccr().modify(|reg| {
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reg.set_vrefen(true);
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});
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// "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us
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// to stabilize the internal voltage reference, we wait a little more.
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@ -106,17 +111,27 @@ impl<'d, T: Instance> Adc<'d, T> {
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}
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pub fn enable_temperature(&self) -> Temperature {
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#[cfg(not(adc_g0))]
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T::common_regs().ccr().modify(|reg| {
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reg.set_ch17sel(true);
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});
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#[cfg(adc_g0)]
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T::regs().ccr().modify(|reg| {
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reg.set_tsen(true);
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});
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Temperature {}
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}
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pub fn enable_vbat(&self) -> Vbat {
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#[cfg(not(adc_g0))]
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T::common_regs().ccr().modify(|reg| {
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reg.set_ch18sel(true);
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});
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#[cfg(adc_g0)]
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T::regs().ccr().modify(|reg| {
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reg.set_vbaten(true);
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});
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Vbat {}
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}
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@ -126,9 +141,9 @@ impl<'d, T: Instance> Adc<'d, T> {
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}
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pub fn set_resolution(&mut self, resolution: Resolution) {
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#[cfg(not(stm32g0))]
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#[cfg(not(adc_g0))]
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T::regs().cfgr().modify(|reg| reg.set_res(resolution.into()));
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#[cfg(stm32g0)]
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#[cfg(adc_g0)]
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T::regs().cfgr1().modify(|reg| reg.set_res(resolution.into()));
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}
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@ -182,9 +197,9 @@ impl<'d, T: Instance> Adc<'d, T> {
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Self::set_channel_sample_time(pin.channel(), self.sample_time);
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// Select channel
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#[cfg(not(stm32g0))]
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#[cfg(not(adc_g0))]
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T::regs().sqr1().write(|reg| reg.set_sq(0, pin.channel()));
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#[cfg(stm32g0)]
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#[cfg(adc_g0)]
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T::regs().chselr().write(|reg| reg.set_chsel(1 << pin.channel()));
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// Some models are affected by an erratum:
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@ -203,12 +218,12 @@ impl<'d, T: Instance> Adc<'d, T> {
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val
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}
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#[cfg(stm32g0)]
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#[cfg(adc_g0)]
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fn set_channel_sample_time(_ch: u8, sample_time: SampleTime) {
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T::regs().smpr().modify(|reg| reg.set_smp1(sample_time.into()));
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}
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#[cfg(not(stm32g0))]
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#[cfg(not(adc_g0))]
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fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
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let sample_time = sample_time.into();
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T::regs()
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