From bc65b8f7ec1df181c793846b7c0657f689963d3a Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 18 Nov 2023 01:18:23 +0100 Subject: [PATCH] stm32/i2c: add async, dual interrupt scaffolding. --- embassy-stm32/Cargo.toml | 4 +- embassy-stm32/build.rs | 20 +++ embassy-stm32/src/i2c/mod.rs | 157 +++++++++++++++++- embassy-stm32/src/i2c/v1.rs | 122 ++++---------- embassy-stm32/src/i2c/v2.rs | 157 ++---------------- examples/stm32f4/src/bin/i2c.rs | 3 +- examples/stm32h5/src/bin/i2c.rs | 3 +- examples/stm32h7/src/bin/camera.rs | 3 +- examples/stm32h7/src/bin/i2c.rs | 3 +- examples/stm32l4/src/bin/i2c.rs | 3 +- .../stm32l4/src/bin/i2c_blocking_async.rs | 3 +- examples/stm32l4/src/bin/i2c_dma.rs | 3 +- .../src/bin/spe_adin1110_http_server.rs | 3 +- 13 files changed, 239 insertions(+), 245 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 65434cec..d04000a1 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -58,7 +58,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true } critical-section = "1.1" -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-fbb8f77326dd066aa6c0d66b3b46e76a569dda8b" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f6d1ffc1a25f208b5cd6b1024bff246592da1949" } vcell = "0.1.3" bxcan = "0.7.0" nb = "1.0.0" @@ -76,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] } [build-dependencies] proc-macro2 = "1.0.36" quote = "1.0.15" -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-fbb8f77326dd066aa6c0d66b3b46e76a569dda8b", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f6d1ffc1a25f208b5cd6b1024bff246592da1949", default-features = false, features = ["metadata"]} [features] diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index a7dac5f9..4aae5822 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1138,6 +1138,23 @@ fn main() { } } + // ======== + // Write peripheral_interrupts module. + let mut mt = TokenStream::new(); + for p in METADATA.peripherals { + let mut pt = TokenStream::new(); + + for irq in p.interrupts { + let iname = format_ident!("{}", irq.interrupt); + let sname = format_ident!("{}", irq.signal); + pt.extend(quote!(pub type #sname = crate::interrupt::typelevel::#iname;)); + } + + let pname = format_ident!("{}", p.name); + mt.extend(quote!(pub mod #pname { #pt })); + } + g.extend(quote!(#[allow(non_camel_case_types)] pub mod peripheral_interrupts { #mt })); + // ======== // Write foreach_foo! macrotables @@ -1296,6 +1313,9 @@ fn main() { let mut m = String::new(); + // DO NOT ADD more macros like these. + // These turned to be a bad idea! + // Instead, make build.rs generate the final code. make_table(&mut m, "foreach_flash_region", &flash_regions_table); make_table(&mut m, "foreach_interrupt", &interrupts_table); make_table(&mut m, "foreach_peripheral", &peripherals_table); diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index dde1a504..19346d70 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -1,11 +1,14 @@ #![macro_use] +use core::marker::PhantomData; + use crate::interrupt; #[cfg_attr(i2c_v1, path = "v1.rs")] #[cfg_attr(i2c_v2, path = "v2.rs")] mod _version; pub use _version::*; +use embassy_sync::waitqueue::AtomicWaker; use crate::peripherals; @@ -23,6 +26,20 @@ pub enum Error { pub(crate) mod sealed { use super::*; + + pub struct State { + #[allow(unused)] + pub waker: AtomicWaker, + } + + impl State { + pub const fn new() -> Self { + Self { + waker: AtomicWaker::new(), + } + } + } + pub trait Instance: crate::rcc::RccPeripheral { fn regs() -> crate::pac::i2c::I2c; fn state() -> &'static State; @@ -30,7 +47,8 @@ pub(crate) mod sealed { } pub trait Instance: sealed::Instance + 'static { - type Interrupt: interrupt::typelevel::Interrupt; + type EventInterrupt: interrupt::typelevel::Interrupt; + type ErrorInterrupt: interrupt::typelevel::Interrupt; } pin_trait!(SclPin, Instance); @@ -38,21 +56,148 @@ pin_trait!(SdaPin, Instance); dma_trait!(RxDma, Instance); dma_trait!(TxDma, Instance); -foreach_interrupt!( - ($inst:ident, i2c, $block:ident, EV, $irq:ident) => { +/// Interrupt handler. +pub struct EventInterruptHandler { + _phantom: PhantomData, +} + +impl interrupt::typelevel::Handler for EventInterruptHandler { + unsafe fn on_interrupt() { + _version::on_interrupt::() + } +} + +pub struct ErrorInterruptHandler { + _phantom: PhantomData, +} + +impl interrupt::typelevel::Handler for ErrorInterruptHandler { + unsafe fn on_interrupt() { + _version::on_interrupt::() + } +} + +foreach_peripheral!( + (i2c, $inst:ident) => { impl sealed::Instance for peripherals::$inst { fn regs() -> crate::pac::i2c::I2c { crate::pac::$inst } - fn state() -> &'static State { - static STATE: State = State::new(); + fn state() -> &'static sealed::State { + static STATE: sealed::State = sealed::State::new(); &STATE } } impl Instance for peripherals::$inst { - type Interrupt = crate::interrupt::typelevel::$irq; + type EventInterrupt = crate::_generated::peripheral_interrupts::$inst::EV; + type ErrorInterrupt = crate::_generated::peripheral_interrupts::$inst::ER; } }; ); + +mod eh02 { + use super::*; + + impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> { + type Error = Error; + + fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { + self.blocking_read(address, buffer) + } + } + + impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> { + type Error = Error; + + fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { + self.blocking_write(address, write) + } + } + + impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> { + type Error = Error; + + fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { + self.blocking_write_read(address, write, read) + } + } +} + +#[cfg(feature = "unstable-traits")] +mod eh1 { + use super::*; + use crate::dma::NoDma; + + impl embedded_hal_1::i2c::Error for Error { + fn kind(&self) -> embedded_hal_1::i2c::ErrorKind { + match *self { + Self::Bus => embedded_hal_1::i2c::ErrorKind::Bus, + Self::Arbitration => embedded_hal_1::i2c::ErrorKind::ArbitrationLoss, + Self::Nack => { + embedded_hal_1::i2c::ErrorKind::NoAcknowledge(embedded_hal_1::i2c::NoAcknowledgeSource::Unknown) + } + Self::Timeout => embedded_hal_1::i2c::ErrorKind::Other, + Self::Crc => embedded_hal_1::i2c::ErrorKind::Other, + Self::Overrun => embedded_hal_1::i2c::ErrorKind::Overrun, + Self::ZeroLengthTransfer => embedded_hal_1::i2c::ErrorKind::Other, + } + } + } + + impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::ErrorType for I2c<'d, T, TXDMA, RXDMA> { + type Error = Error; + } + + impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T, NoDma, NoDma> { + fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { + self.blocking_read(address, read) + } + + fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { + self.blocking_write(address, write) + } + + fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { + self.blocking_write_read(address, write, read) + } + + fn transaction( + &mut self, + _address: u8, + _operations: &mut [embedded_hal_1::i2c::Operation<'_>], + ) -> Result<(), Self::Error> { + todo!(); + } + } +} + +#[cfg(all(feature = "unstable-traits", feature = "nightly"))] +mod eha { + use super::*; + + impl<'d, T: Instance, TXDMA: TxDma, RXDMA: RxDma> embedded_hal_async::i2c::I2c for I2c<'d, T, TXDMA, RXDMA> { + async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { + self.read(address, read).await + } + + async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { + self.write(address, write).await + } + + async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { + self.write_read(address, write, read).await + } + + async fn transaction( + &mut self, + address: u8, + operations: &mut [embedded_hal_1::i2c::Operation<'_>], + ) -> Result<(), Self::Error> { + let _ = address; + let _ = operations; + todo!() + } + } +} diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index ab59f5ab..03f07c4f 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -3,21 +3,17 @@ use core::marker::PhantomData; use embassy_embedded_hal::SetConfig; use embassy_hal_internal::{into_ref, PeripheralRef}; +use super::*; use crate::dma::NoDma; use crate::gpio::sealed::AFType; use crate::gpio::Pull; -use crate::i2c::{Error, Instance, SclPin, SdaPin}; +use crate::interrupt::typelevel::Interrupt; use crate::pac::i2c; use crate::time::Hertz; use crate::{interrupt, Peripheral}; -/// Interrupt handler. -pub struct InterruptHandler { - _phantom: PhantomData, -} - -impl interrupt::typelevel::Handler for InterruptHandler { - unsafe fn on_interrupt() {} +pub unsafe fn on_interrupt() { + // todo } #[non_exhaustive] @@ -27,14 +23,6 @@ pub struct Config { pub scl_pullup: bool, } -pub struct State {} - -impl State { - pub(crate) const fn new() -> Self { - Self {} - } -} - pub struct I2c<'d, T: Instance, TXDMA = NoDma, RXDMA = NoDma> { phantom: PhantomData<&'d mut T>, #[allow(dead_code)] @@ -48,7 +36,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { _peri: impl Peripheral

+ 'd, scl: impl Peripheral

> + 'd, sda: impl Peripheral

> + 'd, - _irq: impl interrupt::typelevel::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + + interrupt::typelevel::Binding> + + 'd, tx_dma: impl Peripheral

+ 'd, rx_dma: impl Peripheral

+ 'd, freq: Hertz, @@ -98,6 +88,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { reg.set_pe(true); }); + unsafe { T::EventInterrupt::enable() }; + unsafe { T::ErrorInterrupt::enable() }; + Self { phantom: PhantomData, tx_dma, @@ -336,6 +329,30 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { pub fn blocking_write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> { self.blocking_write_read_timeout(addr, write, read, || Ok(())) } + + // Async + + pub async fn write(&mut self, _address: u8, _write: &[u8]) -> Result<(), Error> + where + TXDMA: crate::i2c::TxDma, + { + todo!() + } + + pub async fn read(&mut self, _address: u8, _buffer: &mut [u8]) -> Result<(), Error> + where + RXDMA: crate::i2c::RxDma, + { + todo!() + } + + pub async fn write_read(&mut self, _address: u8, _write: &[u8], _read: &mut [u8]) -> Result<(), Error> + where + RXDMA: crate::i2c::RxDma, + TXDMA: crate::i2c::TxDma, + { + todo!() + } } impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> { @@ -344,77 +361,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> { } } -impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> { - type Error = Error; - - fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> { - self.blocking_read(addr, read) - } -} - -impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> { - type Error = Error; - - fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> { - self.blocking_write(addr, write) - } -} - -impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> { - type Error = Error; - - fn write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { - self.blocking_write_read(addr, write, read) - } -} - -#[cfg(feature = "unstable-traits")] -mod eh1 { - use super::*; - - impl embedded_hal_1::i2c::Error for Error { - fn kind(&self) -> embedded_hal_1::i2c::ErrorKind { - match *self { - Self::Bus => embedded_hal_1::i2c::ErrorKind::Bus, - Self::Arbitration => embedded_hal_1::i2c::ErrorKind::ArbitrationLoss, - Self::Nack => { - embedded_hal_1::i2c::ErrorKind::NoAcknowledge(embedded_hal_1::i2c::NoAcknowledgeSource::Unknown) - } - Self::Timeout => embedded_hal_1::i2c::ErrorKind::Other, - Self::Crc => embedded_hal_1::i2c::ErrorKind::Other, - Self::Overrun => embedded_hal_1::i2c::ErrorKind::Overrun, - Self::ZeroLengthTransfer => embedded_hal_1::i2c::ErrorKind::Other, - } - } - } - - impl<'d, T: Instance> embedded_hal_1::i2c::ErrorType for I2c<'d, T> { - type Error = Error; - } - - impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T> { - fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { - self.blocking_read(address, read) - } - - fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { - self.blocking_write(address, write) - } - - fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { - self.blocking_write_read(address, write, read) - } - - fn transaction( - &mut self, - _address: u8, - _operations: &mut [embedded_hal_1::i2c::Operation<'_>], - ) -> Result<(), Self::Error> { - todo!(); - } - } -} - enum Mode { Fast, Standard, diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index 40bcaa9b..8c20e1c5 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -1,19 +1,17 @@ use core::cmp; use core::future::poll_fn; -use core::marker::PhantomData; use core::task::Poll; use embassy_embedded_hal::SetConfig; use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, PeripheralRef}; -use embassy_sync::waitqueue::AtomicWaker; #[cfg(feature = "time")] use embassy_time::{Duration, Instant}; +use super::*; use crate::dma::{NoDma, Transfer}; use crate::gpio::sealed::AFType; use crate::gpio::Pull; -use crate::i2c::{Error, Instance, SclPin, SdaPin}; use crate::interrupt::typelevel::Interrupt; use crate::pac::i2c; use crate::time::Hertz; @@ -36,25 +34,18 @@ pub fn no_timeout_fn() -> impl Fn() -> Result<(), Error> { move || Ok(()) } -/// Interrupt handler. -pub struct InterruptHandler { - _phantom: PhantomData, -} +pub unsafe fn on_interrupt() { + let regs = T::regs(); + let isr = regs.isr().read(); -impl interrupt::typelevel::Handler for InterruptHandler { - unsafe fn on_interrupt() { - let regs = T::regs(); - let isr = regs.isr().read(); - - if isr.tcr() || isr.tc() { - T::state().waker.wake(); - } - // The flag can only be cleared by writting to nbytes, we won't do that here, so disable - // the interrupt - critical_section::with(|_| { - regs.cr1().modify(|w| w.set_tcie(false)); - }); + if isr.tcr() || isr.tc() { + T::state().waker.wake(); } + // The flag can only be cleared by writting to nbytes, we won't do that here, so disable + // the interrupt + critical_section::with(|_| { + regs.cr1().modify(|w| w.set_tcie(false)); + }); } #[non_exhaustive] @@ -77,18 +68,6 @@ impl Default for Config { } } -pub struct State { - waker: AtomicWaker, -} - -impl State { - pub(crate) const fn new() -> Self { - Self { - waker: AtomicWaker::new(), - } - } -} - pub struct I2c<'d, T: Instance, TXDMA = NoDma, RXDMA = NoDma> { _peri: PeripheralRef<'d, T>, #[allow(dead_code)] @@ -104,7 +83,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { peri: impl Peripheral

+ 'd, scl: impl Peripheral

> + 'd, sda: impl Peripheral

> + 'd, - _irq: impl interrupt::typelevel::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + + interrupt::typelevel::Binding> + + 'd, tx_dma: impl Peripheral

+ 'd, rx_dma: impl Peripheral

+ 'd, freq: Hertz, @@ -150,8 +131,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { reg.set_pe(true); }); - T::Interrupt::unpend(); - unsafe { T::Interrupt::enable() }; + unsafe { T::EventInterrupt::enable() }; + unsafe { T::ErrorInterrupt::enable() }; Self { _peri: peri, @@ -987,35 +968,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> { } } -#[cfg(feature = "time")] -mod eh02 { - use super::*; - - impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> { - type Error = Error; - - fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { - self.blocking_read(address, buffer) - } - } - - impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> { - type Error = Error; - - fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { - self.blocking_write(address, write) - } - } - - impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> { - type Error = Error; - - fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { - self.blocking_write_read(address, write, read) - } - } -} - /// I2C Stop Configuration /// /// Peripheral options for generating the STOP condition @@ -1140,83 +1092,6 @@ impl Timings { } } -#[cfg(feature = "unstable-traits")] -mod eh1 { - use super::*; - - impl embedded_hal_1::i2c::Error for Error { - fn kind(&self) -> embedded_hal_1::i2c::ErrorKind { - match *self { - Self::Bus => embedded_hal_1::i2c::ErrorKind::Bus, - Self::Arbitration => embedded_hal_1::i2c::ErrorKind::ArbitrationLoss, - Self::Nack => { - embedded_hal_1::i2c::ErrorKind::NoAcknowledge(embedded_hal_1::i2c::NoAcknowledgeSource::Unknown) - } - Self::Timeout => embedded_hal_1::i2c::ErrorKind::Other, - Self::Crc => embedded_hal_1::i2c::ErrorKind::Other, - Self::Overrun => embedded_hal_1::i2c::ErrorKind::Overrun, - Self::ZeroLengthTransfer => embedded_hal_1::i2c::ErrorKind::Other, - } - } - } - - impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::ErrorType for I2c<'d, T, TXDMA, RXDMA> { - type Error = Error; - } - - impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T, NoDma, NoDma> { - fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { - self.blocking_read(address, read) - } - - fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { - self.blocking_write(address, write) - } - - fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { - self.blocking_write_read(address, write, read) - } - - fn transaction( - &mut self, - _address: u8, - _operations: &mut [embedded_hal_1::i2c::Operation<'_>], - ) -> Result<(), Self::Error> { - todo!(); - } - } -} - -#[cfg(all(feature = "unstable-traits", feature = "nightly"))] -mod eha { - use super::super::{RxDma, TxDma}; - use super::*; - - impl<'d, T: Instance, TXDMA: TxDma, RXDMA: RxDma> embedded_hal_async::i2c::I2c for I2c<'d, T, TXDMA, RXDMA> { - async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { - self.read(address, read).await - } - - async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { - self.write(address, write).await - } - - async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { - self.write_read(address, write, read).await - } - - async fn transaction( - &mut self, - address: u8, - operations: &mut [embedded_hal_1::i2c::Operation<'_>], - ) -> Result<(), Self::Error> { - let _ = address; - let _ = operations; - todo!() - } - } -} - impl<'d, T: Instance> SetConfig for I2c<'d, T> { type Config = Hertz; type ConfigError = (); diff --git a/examples/stm32f4/src/bin/i2c.rs b/examples/stm32f4/src/bin/i2c.rs index 032bd97e..4f4adde2 100644 --- a/examples/stm32f4/src/bin/i2c.rs +++ b/examples/stm32f4/src/bin/i2c.rs @@ -14,7 +14,8 @@ const ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; bind_interrupts!(struct Irqs { - I2C2_EV => i2c::InterruptHandler; + I2C2_EV => i2c::EventInterruptHandler; + I2C2_ER => i2c::ErrorInterruptHandler; }); #[embassy_executor::main] diff --git a/examples/stm32h5/src/bin/i2c.rs b/examples/stm32h5/src/bin/i2c.rs index 8b1662f3..31783a2b 100644 --- a/examples/stm32h5/src/bin/i2c.rs +++ b/examples/stm32h5/src/bin/i2c.rs @@ -13,7 +13,8 @@ const ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; bind_interrupts!(struct Irqs { - I2C2_EV => i2c::InterruptHandler; + I2C2_EV => i2c::EventInterruptHandler; + I2C2_ER => i2c::ErrorInterruptHandler; }); #[embassy_executor::main] diff --git a/examples/stm32h7/src/bin/camera.rs b/examples/stm32h7/src/bin/camera.rs index 23ece1c3..489fb03d 100644 --- a/examples/stm32h7/src/bin/camera.rs +++ b/examples/stm32h7/src/bin/camera.rs @@ -19,7 +19,8 @@ const HEIGHT: usize = 100; static mut FRAME: [u32; WIDTH * HEIGHT / 2] = [0u32; WIDTH * HEIGHT / 2]; bind_interrupts!(struct Irqs { - I2C1_EV => i2c::InterruptHandler; + I2C1_EV => i2c::EventInterruptHandler; + I2C1_ER => i2c::ErrorInterruptHandler; DCMI => dcmi::InterruptHandler; }); diff --git a/examples/stm32h7/src/bin/i2c.rs b/examples/stm32h7/src/bin/i2c.rs index 9aa0ca08..aea21ec6 100644 --- a/examples/stm32h7/src/bin/i2c.rs +++ b/examples/stm32h7/src/bin/i2c.rs @@ -13,7 +13,8 @@ const ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; bind_interrupts!(struct Irqs { - I2C2_EV => i2c::InterruptHandler; + I2C2_EV => i2c::EventInterruptHandler; + I2C2_ER => i2c::ErrorInterruptHandler; }); #[embassy_executor::main] diff --git a/examples/stm32l4/src/bin/i2c.rs b/examples/stm32l4/src/bin/i2c.rs index d0060d20..07dc12e8 100644 --- a/examples/stm32l4/src/bin/i2c.rs +++ b/examples/stm32l4/src/bin/i2c.rs @@ -14,7 +14,8 @@ const ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; bind_interrupts!(struct Irqs { - I2C2_EV => i2c::InterruptHandler; + I2C2_EV => i2c::EventInterruptHandler; + I2C2_ER => i2c::ErrorInterruptHandler; }); #[embassy_executor::main] diff --git a/examples/stm32l4/src/bin/i2c_blocking_async.rs b/examples/stm32l4/src/bin/i2c_blocking_async.rs index eca59087..60a4e2eb 100644 --- a/examples/stm32l4/src/bin/i2c_blocking_async.rs +++ b/examples/stm32l4/src/bin/i2c_blocking_async.rs @@ -16,7 +16,8 @@ const ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; bind_interrupts!(struct Irqs { - I2C2_EV => i2c::InterruptHandler; + I2C2_EV => i2c::EventInterruptHandler; + I2C2_ER => i2c::ErrorInterruptHandler; }); #[embassy_executor::main] diff --git a/examples/stm32l4/src/bin/i2c_dma.rs b/examples/stm32l4/src/bin/i2c_dma.rs index cf6f3da6..4c2c224a 100644 --- a/examples/stm32l4/src/bin/i2c_dma.rs +++ b/examples/stm32l4/src/bin/i2c_dma.rs @@ -13,7 +13,8 @@ const ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; bind_interrupts!(struct Irqs { - I2C2_EV => i2c::InterruptHandler; + I2C2_EV => i2c::EventInterruptHandler; + I2C2_ER => i2c::ErrorInterruptHandler; }); #[embassy_executor::main] diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs index 3a7e5370..4826e0be 100644 --- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs +++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs @@ -40,7 +40,8 @@ use static_cell::make_static; use {embassy_stm32 as hal, panic_probe as _}; bind_interrupts!(struct Irqs { - I2C3_EV => i2c::InterruptHandler; + I2C3_EV => i2c::EventInterruptHandler; + I2C3_ER => i2c::ErrorInterruptHandler; RNG => rng::InterruptHandler; });