Update embedded-hal crates.
This commit is contained in:
@ -54,35 +54,35 @@ where
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M: RawMutex + 'static,
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BUS: i2c::I2c + 'static,
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{
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async fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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let mut bus = self.bus.lock().await;
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bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
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bus.read(address, read).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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}
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async fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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let mut bus = self.bus.lock().await;
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bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
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bus.write(address, write).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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}
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async fn write_read<'a>(
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&'a mut self,
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async fn write_read(
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&mut self,
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address: u8,
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wr_buffer: &'a [u8],
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rd_buffer: &'a mut [u8],
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write: &[u8],
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read: &mut [u8],
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) -> Result<(), I2cDeviceError<BUS::Error>> {
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let mut bus = self.bus.lock().await;
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bus.write_read(address, wr_buffer, rd_buffer)
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bus.write_read(address, write, read)
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.await
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.map_err(I2cDeviceError::I2c)?;
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Ok(())
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}
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async fn transaction<'a, 'b>(
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&'a mut self,
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async fn transaction(
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&mut self,
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address: u8,
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operations: &'a mut [embedded_hal_async::i2c::Operation<'b>],
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operations: &mut [embedded_hal_async::i2c::Operation<'_>],
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) -> Result<(), I2cDeviceError<BUS::Error>> {
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let _ = address;
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let _ = operations;
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@ -121,25 +121,25 @@ where
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M: RawMutex + 'static,
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BUS: i2c::I2c + SetConfig + 'static,
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{
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async fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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}
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async fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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async fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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}
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async fn write_read<'a>(
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&'a mut self,
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async fn write_read(
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&mut self,
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address: u8,
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wr_buffer: &'a [u8],
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rd_buffer: &'a mut [u8],
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wr_buffer: &[u8],
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rd_buffer: &mut [u8],
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) -> Result<(), I2cDeviceError<BUS::Error>> {
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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@ -149,11 +149,7 @@ where
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Ok(())
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}
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async fn transaction<'a, 'b>(
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&'a mut self,
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address: u8,
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operations: &'a mut [embedded_hal_async::i2c::Operation<'b>],
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) -> Result<(), I2cDeviceError<BUS::Error>> {
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async fn transaction(&mut self, address: u8, operations: &mut [i2c::Operation<'_>]) -> Result<(), Self::Error> {
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let _ = address;
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let _ = operations;
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todo!()
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