From be66e0f7cec742d580a224f12a79b2ab2ca78e37 Mon Sep 17 00:00:00 2001 From: pennae Date: Sun, 30 Apr 2023 09:30:10 +0200 Subject: [PATCH] rp/uart: make dma multicore-safe running rx and tx on different cores could lead to hangs if the dmacr register modifys run concurrently. this is bad. --- embassy-rp/src/uart/mod.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index 0b323978..f198afe2 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs @@ -206,7 +206,7 @@ impl<'d, T: Instance> UartTx<'d, T, Async> { pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> { let ch = self.tx_dma.as_mut().unwrap(); let transfer = unsafe { - T::regs().uartdmacr().modify(|reg| { + T::regs().uartdmacr().write_set(|reg| { reg.set_txdmae(true); }); // If we don't assign future to a variable, the data register pointer @@ -296,7 +296,7 @@ impl<'d, T: Instance> UartRx<'d, T, Async> { pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> { let ch = self.rx_dma.as_mut().unwrap(); let transfer = unsafe { - T::regs().uartdmacr().modify(|reg| { + T::regs().uartdmacr().write_set(|reg| { reg.set_rxdmae(true); }); // If we don't assign future to a variable, the data register pointer