diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index cf70e2e5..97c668ac 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -55,24 +55,6 @@ jobs: - package: embassy-nrf target: thumbv7em-none-eabi features: nrf52840,defmt - - package: embassy-stm32-examples - target: thumbv7em-none-eabi - features: stm32f405 - - package: embassy-stm32 - target: thumbv7em-none-eabi - features: stm32f405 - - package: embassy-stm32 - target: thumbv7em-none-eabi - features: stm32f446 - - package: embassy-stm32 - target: thumbv7em-none-eabi - features: stm32f405,defmt - - package: embassy-stm32 - target: thumbv6m-none-eabi - features: stm32l0x2 - - package: embassy-stm32 - target: thumbv6m-none-eabi - features: stm32l0x2,defmt - package: embassy-rp-examples target: thumbv6m-none-eabi diff --git a/embassy-macros/Cargo.toml b/embassy-macros/Cargo.toml index 6da2a586..265a0c08 100644 --- a/embassy-macros/Cargo.toml +++ b/embassy-macros/Cargo.toml @@ -14,7 +14,6 @@ proc-macro2 = "1.0.24" proc-macro = true [features] -stm32 = [] nrf = [] rp = [] std = [] diff --git a/embassy-macros/src/chip/stm32.rs b/embassy-macros/src/chip/stm32.rs deleted file mode 100644 index 3f299650..00000000 --- a/embassy-macros/src/chip/stm32.rs +++ /dev/null @@ -1,28 +0,0 @@ -use crate::path::ModulePrefix; -use proc_macro2::TokenStream; -use quote::quote; - -pub fn generate(embassy_prefix: &ModulePrefix, config: syn::Expr) -> TokenStream { - let embassy_path = embassy_prefix.append("embassy").path(); - let embassy_stm32_path = embassy_prefix.append("embassy_stm32").path(); - - quote!( - use #embassy_stm32_path::{rtc, interrupt, Peripherals, pac, hal::rcc::RccExt, hal::time::U32Ext}; - - unsafe { #embassy_stm32_path::system::configure(#config) }; - - let (dp, clocks) = Peripherals::take().unwrap(); - - let mut rtc = rtc::RTC::new(dp.TIM2, interrupt::take!(TIM2), clocks); - let rtc = unsafe { make_static(&mut rtc) }; - rtc.start(); - let mut alarm = rtc.alarm1(); - - unsafe { #embassy_path::time::set_clock(rtc) }; - - let alarm = unsafe { make_static(&mut alarm) }; - executor.set_alarm(alarm); - - unsafe { Peripherals::set_peripherals(clocks) }; - ) -} diff --git a/embassy-macros/src/lib.rs b/embassy-macros/src/lib.rs index 590289f9..d91549ca 100644 --- a/embassy-macros/src/lib.rs +++ b/embassy-macros/src/lib.rs @@ -267,10 +267,6 @@ pub fn interrupt_take(item: TokenStream) -> TokenStream { #[path = "chip/nrf.rs"] mod chip; -#[cfg(feature = "stm32")] -#[path = "chip/stm32.rs"] -mod chip; - #[cfg(feature = "rp")] #[path = "chip/rp.rs"] mod chip; @@ -284,7 +280,7 @@ struct MainArgs { config: Option, } -#[cfg(any(feature = "nrf", feature = "stm32", feature = "rp"))] +#[cfg(any(feature = "nrf", feature = "rp"))] #[proc_macro_attribute] pub fn main(args: TokenStream, item: TokenStream) -> TokenStream { let macro_args = syn::parse_macro_input!(args as syn::AttributeArgs); diff --git a/embassy-stm32-examples/.cargo/config.toml b/embassy-stm32-examples/.cargo/config.toml deleted file mode 100644 index 3ccca879..00000000 --- a/embassy-stm32-examples/.cargo/config.toml +++ /dev/null @@ -1,28 +0,0 @@ -[target.'cfg(all(target_arch = "arm", target_os = "none"))'] -runner = "probe-run --chip STM32F401CCUx" - -rustflags = [ - # LLD (shipped with the Rust toolchain) is used as the default linker - "-C", "link-arg=--nmagic", - "-C", "link-arg=-Tlink.x", - "-C", "link-arg=-Tdefmt.x", - - # if you run into problems with LLD switch to the GNU linker by commenting out - # this line - # "-C", "linker=arm-none-eabi-ld", - - # if you need to link to pre-compiled C libraries provided by a C toolchain - # use GCC as the linker by commenting out both lines above and then - # uncommenting the three lines below - # "-C", "linker=arm-none-eabi-gcc", - # "-C", "link-arg=-Wl,-Tlink.x", - # "-C", "link-arg=-nostartfiles", - - # Code-size optimizations. - "-Z", "trap-unreachable=no", - "-C", "inline-threshold=5", - "-C", "no-vectorize-loops", -] - -[build] -target = "thumbv7em-none-eabi" diff --git a/embassy-stm32-examples/Cargo.toml b/embassy-stm32-examples/Cargo.toml deleted file mode 100644 index bdb1ca84..00000000 --- a/embassy-stm32-examples/Cargo.toml +++ /dev/null @@ -1,53 +0,0 @@ -[package] -authors = ["Dario Nieuwenhuis "] -edition = "2018" -name = "embassy-stm32f4-examples" -version = "0.1.0" - -[features] -default = [ - "defmt-default", -] -defmt-default = [] -defmt-trace = [] -defmt-debug = [] -defmt-info = [] -defmt-warn = [] -defmt-error = [] - -stm32f401 = ["embassy-stm32/stm32f401"] -stm32f405 = ["embassy-stm32/stm32f405"] -stm32f407 = ["embassy-stm32/stm32f407"] -stm32f410 = ["embassy-stm32/stm32f410"] -stm32f411 = ["embassy-stm32/stm32f411"] -stm32f412 = ["embassy-stm32/stm32f412"] -stm32f413 = ["embassy-stm32/stm32f413"] -stm32f415 = ["embassy-stm32/stm32f405"] -stm32f417 = ["embassy-stm32/stm32f407"] -stm32f423 = ["embassy-stm32/stm32f413"] -stm32f427 = ["embassy-stm32/stm32f427"] -stm32f429 = ["embassy-stm32/stm32f429"] -stm32f437 = ["embassy-stm32/stm32f427"] -stm32f439 = ["embassy-stm32/stm32f429"] -stm32f446 = ["embassy-stm32/stm32f446"] -stm32f469 = ["embassy-stm32/stm32f469"] -stm32f479 = ["embassy-stm32/stm32f469"] - - -[dependencies] -embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] } -embassy-traits = { version = "0.1.0", path = "../embassy-traits", features = ["defmt"] } -embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32" } -embassy-extras = {version = "0.1.0", path = "../embassy-extras" } - -defmt = "0.2.0" -defmt-rtt = "0.2.0" - -cortex-m = "0.7.1" -cortex-m-rt = "0.6.13" -embedded-hal = { version = "0.2.4" } -panic-probe = { version = "0.2.0", features = ["print-defmt"] } -futures = { version = "0.3.8", default-features = false, features = ["async-await"] } -rtt-target = { version = "0.3", features = ["cortex-m"] } -bxcan = "0.5.0" -usb-device = "0.2.7" diff --git a/embassy-stm32-examples/build.rs b/embassy-stm32-examples/build.rs deleted file mode 100644 index d534cc3d..00000000 --- a/embassy-stm32-examples/build.rs +++ /dev/null @@ -1,31 +0,0 @@ -//! This build script copies the `memory.x` file from the crate root into -//! a directory where the linker can always find it at build time. -//! For many projects this is optional, as the linker always searches the -//! project root directory -- wherever `Cargo.toml` is. However, if you -//! are using a workspace or have a more complicated build setup, this -//! build script becomes required. Additionally, by requesting that -//! Cargo re-run the build script whenever `memory.x` is changed, -//! updating `memory.x` ensures a rebuild of the application with the -//! new memory settings. - -use std::env; -use std::fs::File; -use std::io::Write; -use std::path::PathBuf; - -fn main() { - // Put `memory.x` in our output directory and ensure it's - // on the linker search path. - let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); - File::create(out.join("memory.x")) - .unwrap() - .write_all(include_bytes!("memory.x")) - .unwrap(); - println!("cargo:rustc-link-search={}", out.display()); - - // By default, Cargo will re-run a build script whenever - // any file in the project changes. By specifying `memory.x` - // here, we ensure the build script is only re-run when - // `memory.x` is changed. - println!("cargo:rerun-if-changed=memory.x"); -} diff --git a/embassy-stm32-examples/memory.x b/embassy-stm32-examples/memory.x deleted file mode 100644 index efa700b8..00000000 --- a/embassy-stm32-examples/memory.x +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - FLASH : ORIGIN = 0x08000000, LENGTH = 64K - RAM : ORIGIN = 0x20000000, LENGTH = 32K -} diff --git a/embassy-stm32-examples/src/bin/can.rs b/embassy-stm32-examples/src/bin/can.rs deleted file mode 100644 index 72272212..00000000 --- a/embassy-stm32-examples/src/bin/can.rs +++ /dev/null @@ -1,57 +0,0 @@ -#![no_std] -#![no_main] -#![feature(trait_alias)] -#![feature(type_alias_impl_trait)] -#![feature(min_type_alias_impl_trait)] -#![feature(impl_trait_in_bindings)] - -#[path = "../example_common.rs"] -mod example_common; -use example_common::{panic, *}; - -use bxcan::filter::Mask32; -use cortex_m_rt::entry; -use embassy::executor::Executor; -use embassy::util::Forever; -use embassy_stm32::hal::prelude::*; -use embassy_stm32::hal::{can::Can, stm32}; -use embassy_stm32::{can, interrupt}; - -#[embassy::task] -async fn run(dp: stm32::Peripherals, _cp: cortex_m::Peripherals) { - let gpioa = dp.GPIOA.split(); - - let rx = gpioa.pa11.into_alternate_af9(); - let tx = gpioa.pa12.into_alternate_af9(); - let mut can = bxcan::Can::new(Can::new(dp.CAN1, (tx, rx))); - - // APB1 (PCLK1): 24MHz, Bit rate: 20kBit/s, Sample Point 87.5% - // Value was calculated with http://www.bittiming.can-wiki.info/ - can.modify_config().set_bit_timing(0x001c_004a); - // Configure filters so that can frames can be received. - can.modify_filters().enable_bank(0, Mask32::accept_all()); - - let mut can = can::Can::new(can, interrupt::take!(CAN1_TX), interrupt::take!(CAN1_RX0)); - - let _frame = can.receive().await; -} - -static EXECUTOR: Forever = Forever::new(); - -#[entry] -fn main() -> ! { - let dp = stm32::Peripherals::take().unwrap(); - let cp = cortex_m::peripheral::Peripherals::take().unwrap(); - - dp.DBGMCU.cr.modify(|_, w| { - w.dbg_sleep().set_bit(); - w.dbg_standby().set_bit(); - w.dbg_stop().set_bit() - }); - dp.RCC.ahb1enr.modify(|_, w| w.dma1en().enabled()); - - let executor = EXECUTOR.put(Executor::new()); - executor.run(|spawner| { - unwrap!(spawner.spawn(run(dp, cp))); - }); -} diff --git a/embassy-stm32-examples/src/bin/exti.rs b/embassy-stm32-examples/src/bin/exti.rs deleted file mode 100644 index e13b23ba..00000000 --- a/embassy-stm32-examples/src/bin/exti.rs +++ /dev/null @@ -1,57 +0,0 @@ -#![no_std] -#![no_main] -#![feature(trait_alias)] -#![feature(min_type_alias_impl_trait)] -#![feature(impl_trait_in_bindings)] -#![feature(type_alias_impl_trait)] - -#[path = "../example_common.rs"] -mod example_common; -use example_common::{panic, *}; - -use cortex_m_rt::entry; -use embassy::executor::Executor; -use embassy::traits::gpio::*; -use embassy::util::Forever; -use embassy_stm32::exti::ExtiPin; -use embassy_stm32::hal::prelude::*; -use embassy_stm32::interrupt; -use embassy_stm32::pac as stm32; -use futures::pin_mut; - -#[embassy::task] -async fn run(dp: stm32::Peripherals, _cp: cortex_m::Peripherals) { - let gpioa = dp.GPIOA.split(); - - let button = gpioa.pa0.into_pull_up_input(); - let mut syscfg = dp.SYSCFG.constrain(); - - let mut pin = ExtiPin::new(button, interrupt::take!(EXTI0), &mut syscfg); - - info!("Starting loop"); - - loop { - pin.wait_for_rising_edge().await; - info!("edge detected!"); - } -} - -static EXECUTOR: Forever = Forever::new(); - -#[entry] -fn main() -> ! { - let dp = stm32::Peripherals::take().unwrap(); - let cp = cortex_m::peripheral::Peripherals::take().unwrap(); - - dp.DBGMCU.cr.modify(|_, w| { - w.dbg_sleep().set_bit(); - w.dbg_standby().set_bit(); - w.dbg_stop().set_bit() - }); - dp.RCC.ahb1enr.modify(|_, w| w.dma1en().enabled()); - - let executor = EXECUTOR.put(Executor::new()); - executor.run(|spawner| { - unwrap!(spawner.spawn(run(dp, cp))); - }); -} diff --git a/embassy-stm32-examples/src/bin/hello.rs b/embassy-stm32-examples/src/bin/hello.rs deleted file mode 100644 index b851482d..00000000 --- a/embassy-stm32-examples/src/bin/hello.rs +++ /dev/null @@ -1,42 +0,0 @@ -#![no_std] -#![no_main] -#![feature(trait_alias)] -#![feature(min_type_alias_impl_trait)] -#![feature(impl_trait_in_bindings)] -#![feature(type_alias_impl_trait)] - -#[path = "../example_common.rs"] -mod example_common; -use example_common::*; - -use cortex_m_rt::entry; -use embassy_stm32::hal::prelude::*; - -#[entry] -fn main() -> ! { - info!("Hello World!"); - - let p = embassy_stm32::pac::Peripherals::take().unwrap(); - - p.DBGMCU.cr.modify(|_, w| { - w.dbg_sleep().set_bit(); - w.dbg_standby().set_bit(); - w.dbg_stop().set_bit() - }); - p.RCC.ahb1enr.modify(|_, w| w.dma1en().enabled()); - - let gpioa = p.GPIOA.split(); - let gpioc = p.GPIOC.split(); - - let mut led = gpioc.pc13.into_push_pull_output(); - let button = gpioa.pa0.into_pull_up_input(); - led.set_low().unwrap(); - - loop { - if button.is_high().unwrap() { - led.set_low().unwrap(); - } else { - led.set_high().unwrap(); - } - } -} diff --git a/embassy-stm32-examples/src/bin/rtc_async.rs b/embassy-stm32-examples/src/bin/rtc_async.rs deleted file mode 100644 index b780c3c1..00000000 --- a/embassy-stm32-examples/src/bin/rtc_async.rs +++ /dev/null @@ -1,40 +0,0 @@ -#![no_std] -#![no_main] -#![feature(min_type_alias_impl_trait)] -#![feature(impl_trait_in_bindings)] -#![feature(type_alias_impl_trait)] - -#[path = "../example_common.rs"] -mod example_common; -use example_common::*; - -use defmt::panic; -use embassy; - -use embassy::executor::Spawner; -use embassy::time::{Duration, Timer}; -use embassy_stm32; -use embassy_stm32::hal; - -#[embassy::task] -async fn run1() { - loop { - info!("BIG INFREQUENT TICK"); - Timer::after(Duration::from_ticks(32768 * 2 as u64)).await; - } -} - -#[embassy::task] -async fn run2() { - loop { - info!("tick"); - Timer::after(Duration::from_ticks(13000 as u64)).await; - } -} - -#[embassy::main(config = "embassy_stm32::system::Config::new().use_hse(16)")] -async fn main(spawner: Spawner) { - let (dp, clocks) = embassy_stm32::Peripherals::take().unwrap(); - - spawner.spawn(run1()).unwrap(); -} diff --git a/embassy-stm32-examples/src/bin/serial.rs b/embassy-stm32-examples/src/bin/serial.rs deleted file mode 100644 index c48ba746..00000000 --- a/embassy-stm32-examples/src/bin/serial.rs +++ /dev/null @@ -1,80 +0,0 @@ -#![no_std] -#![no_main] -#![feature(trait_alias)] -#![feature(min_type_alias_impl_trait)] -#![feature(impl_trait_in_bindings)] -#![feature(type_alias_impl_trait)] - -#[path = "../example_common.rs"] -mod example_common; -use example_common::{panic, *}; - -use cortex_m::singleton; -use cortex_m_rt::entry; -use embassy::executor::{Executor, Spawner}; -use embassy::traits::uart::{Read, ReadUntilIdle, Write}; -use embassy::util::Forever; -use embassy_stm32::hal::dma::StreamsTuple; -use embassy_stm32::hal::prelude::*; -use embassy_stm32::hal::serial::config::Config; -use embassy_stm32::interrupt; -use embassy_stm32::pac as stm32; -use embassy_stm32::serial; -use futures::pin_mut; - -#[embassy::main(config = "embassy_stm32::system::Config::new().use_hse(16).sysclk(48).pclk1(24)")] -async fn main(spawner: Spawner) { - let (dp, clocks) = embassy_stm32::Peripherals::take().unwrap(); - let cp = cortex_m::peripheral::Peripherals::take().unwrap(); - - dp.DBGMCU.cr.modify(|_, w| { - w.dbg_sleep().set_bit(); - w.dbg_standby().set_bit(); - w.dbg_stop().set_bit() - }); - - // https://gist.github.com/thalesfragoso/a07340c5df6eee3b04c42fdc69ecdcb1 - let gpioa = dp.GPIOA.split(); - let streams = StreamsTuple::new(dp.DMA2); - - let _serial = unsafe { - serial::Serial::new( - dp.USART1, - (streams.7, streams.2), - ( - gpioa.pa9.into_alternate_af7(), - gpioa.pa10.into_alternate_af7(), - ), - interrupt::take!(DMA2_STREAM7), - interrupt::take!(DMA2_STREAM2), - interrupt::take!(USART1), - Config::default().baudrate(9600.bps()), - clocks, - ) - }; - - let streams = StreamsTuple::new(dp.DMA1); - - let mut serial = unsafe { - serial::Serial::new( - dp.USART2, - (streams.6, streams.5), - ( - gpioa.pa2.into_alternate_af7(), - gpioa.pa3.into_alternate_af7(), - ), - interrupt::take!(DMA1_STREAM6), - interrupt::take!(DMA1_STREAM5), - interrupt::take!(USART2), - Config::default().baudrate(9600.bps()), - clocks, - ) - }; - pin_mut!(serial); - - let buf = singleton!(: [u8; 30] = [0; 30]).unwrap(); - - buf[5] = 0x01; - serial.as_mut().write(buf).await.unwrap(); - serial.as_mut().read_until_idle(buf).await.unwrap(); -} diff --git a/embassy-stm32-examples/src/bin/usb_serial.rs b/embassy-stm32-examples/src/bin/usb_serial.rs deleted file mode 100644 index 38656b97..00000000 --- a/embassy-stm32-examples/src/bin/usb_serial.rs +++ /dev/null @@ -1,119 +0,0 @@ -#![no_std] -#![no_main] -#![feature(type_alias_impl_trait)] -#![feature(min_type_alias_impl_trait)] -#![feature(impl_trait_in_bindings)] - -#[path = "../example_common.rs"] -mod example_common; -use example_common::*; - -use cortex_m_rt::entry; -use defmt::panic; -use embassy::executor::{Executor, Spawner}; -use embassy::interrupt::InterruptExt; -use embassy::io::{AsyncBufReadExt, AsyncWriteExt}; -use embassy::time::{Duration, Timer}; -use embassy::util::Forever; -use embassy_extras::usb::usb_serial::UsbSerial; -use embassy_extras::usb::Usb; -use embassy_stm32::hal::otg_fs::{UsbBus, USB}; -use embassy_stm32::hal::prelude::*; -use embassy_stm32::{interrupt, pac, rtc}; -use futures::future::{select, Either}; -use futures::pin_mut; -use usb_device::bus::UsbBusAllocator; -use usb_device::prelude::*; - -#[embassy::task] -async fn run1(bus: &'static mut UsbBusAllocator>) { - info!("Async task"); - - let mut read_buf = [0u8; 128]; - let mut write_buf = [0u8; 128]; - let serial = UsbSerial::new(bus, &mut read_buf, &mut write_buf); - - let device = UsbDeviceBuilder::new(bus, UsbVidPid(0x16c0, 0x27dd)) - .manufacturer("Fake company") - .product("Serial port") - .serial_number("TEST") - .device_class(0x02) - .build(); - - let irq = interrupt::take!(OTG_FS); - irq.set_priority(interrupt::Priority::P3); - - let usb = Usb::new(device, serial, irq); - pin_mut!(usb); - usb.as_mut().start(); - - let (mut read_interface, mut write_interface) = usb.as_ref().take_serial_0(); - - let mut buf = [0u8; 64]; - loop { - let mut n = 0; - let left = { - let recv_fut = async { - loop { - let byte = unwrap!(read_interface.read_byte().await); - unwrap!(write_interface.write_byte(byte).await); - buf[n] = byte; - - n += 1; - if byte == b'\n' || byte == b'\r' || n == buf.len() { - break; - } - } - }; - pin_mut!(recv_fut); - - let timeout = Timer::after(Duration::from_ticks(32768 * 10)); - - match select(recv_fut, timeout).await { - Either::Left(_) => true, - Either::Right(_) => false, - } - }; - - if left { - for c in buf[..n].iter_mut() { - if 0x61 <= *c && *c <= 0x7a { - *c &= !0x20; - } - } - unwrap!(write_interface.write_byte(b'\n').await); - unwrap!(write_interface.write_all(&buf[..n]).await); - unwrap!(write_interface.write_byte(b'\n').await); - } else { - unwrap!(write_interface.write_all(b"\r\nSend something\r\n").await); - } - } -} - -static USB_BUS: Forever>> = Forever::new(); - -#[embassy::main( - config = "embassy_stm32::system::Config::new().use_hse(25).sysclk(48).require_pll48clk()" -)] -async fn main(spawner: Spawner) -> ! { - static mut EP_MEMORY: [u32; 1024] = [0; 1024]; - - info!("Hello World!"); - - let (p, clocks) = embassy_stm32::Peripherals::take().unwrap(); - - let gpioa = p.GPIOA.split(); - let usb = USB { - usb_global: p.OTG_FS_GLOBAL, - usb_device: p.OTG_FS_DEVICE, - usb_pwrclk: p.OTG_FS_PWRCLK, - pin_dm: gpioa.pa11.into_alternate_af10(), - pin_dp: gpioa.pa12.into_alternate_af10(), - hclk: clocks.hclk(), - }; - // Rust analyzer isn't recognizing the static ref magic `cortex-m` does - #[allow(unused_unsafe)] - let usb_bus = USB_BUS.put(UsbBus::new(usb, unsafe { &mut EP_MEMORY })); - - spawner.spawn(run1(usb_bus)).unwrap(); -} diff --git a/embassy-stm32-examples/src/example_common.rs b/embassy-stm32-examples/src/example_common.rs deleted file mode 100644 index 54d63383..00000000 --- a/embassy-stm32-examples/src/example_common.rs +++ /dev/null @@ -1,17 +0,0 @@ -#![macro_use] - -use defmt_rtt as _; // global logger -use panic_probe as _; - -pub use defmt::*; - -use core::sync::atomic::{AtomicUsize, Ordering}; - -defmt::timestamp! {"{=u64}", { - static COUNT: AtomicUsize = AtomicUsize::new(0); - // NOTE(no-CAS) `timestamps` runs with interrupts disabled - let n = COUNT.load(Ordering::Relaxed); - COUNT.store(n + 1, Ordering::Relaxed); - n as u64 - } -} diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml deleted file mode 100644 index 1eeb2d21..00000000 --- a/embassy-stm32/Cargo.toml +++ /dev/null @@ -1,53 +0,0 @@ -[package] -name = "embassy-stm32" -version = "0.1.0" -authors = ["Dario Nieuwenhuis "] -edition = "2018" - -[features] -defmt-trace = [ ] -defmt-debug = [ ] -defmt-info = [ ] -defmt-warn = [ ] -defmt-error = [ ] - -stm32f401 = ["stm32f4xx-hal/stm32f401"] -stm32f405 = ["stm32f4xx-hal/stm32f405"] -stm32f407 = ["stm32f4xx-hal/stm32f407"] -stm32f410 = ["stm32f4xx-hal/stm32f410"] -stm32f411 = ["stm32f4xx-hal/stm32f411"] -stm32f412 = ["stm32f4xx-hal/stm32f412"] -stm32f413 = ["stm32f4xx-hal/stm32f413"] -stm32f415 = ["stm32f4xx-hal/stm32f405"] -stm32f417 = ["stm32f4xx-hal/stm32f407"] -stm32f423 = ["stm32f4xx-hal/stm32f413"] -stm32f427 = ["stm32f4xx-hal/stm32f427"] -stm32f429 = ["stm32f4xx-hal/stm32f429"] -stm32f437 = ["stm32f4xx-hal/stm32f427"] -stm32f439 = ["stm32f4xx-hal/stm32f429"] -stm32f446 = ["stm32f4xx-hal/stm32f446"] -stm32f469 = ["stm32f4xx-hal/stm32f469"] -stm32f479 = ["stm32f4xx-hal/stm32f469"] - -stm32l0x1 = ["stm32l0xx-hal/stm32l0x1"] -stm32l0x2 = ["stm32l0xx-hal/stm32l0x2"] -stm32l0x3 = ["stm32l0xx-hal/stm32l0x3"] - -[dependencies] -embassy = { version = "0.1.0", path = "../embassy" } -embassy-macros = { version = "0.1.0", path = "../embassy-macros", features = ["stm32"]} -embassy-extras = {version = "0.1.0", path = "../embassy-extras" } - -atomic-polyfill = "0.1.1" -critical-section = "0.2.1" -defmt = { version = "0.2.0", optional = true } -log = { version = "0.4.11", optional = true } -cortex-m-rt = "0.6.13" -cortex-m = "0.7.1" -embedded-hal = { version = "0.2.4" } -embedded-dma = { version = "0.1.2" } -bxcan = "0.5.0" -nb = "*" -stm32f4xx-hal = { version = "0.9.0", features = ["rt", "can", "usb_fs"], optional = true } -stm32l0xx-hal = { version = "0.7.0", features = ["rt"], optional = true } -futures = { version = "0.3.5", default-features = false, features = ["async-await"] } diff --git a/embassy-stm32/src/can.rs b/embassy-stm32/src/can.rs deleted file mode 100644 index f97e900e..00000000 --- a/embassy-stm32/src/can.rs +++ /dev/null @@ -1,120 +0,0 @@ -//! Async low power Serial. -//! -//! The peripheral is autmatically enabled and disabled as required to save power. -//! Lowest power consumption can only be guaranteed if the send receive futures -//! are dropped correctly (e.g. not using `mem::forget()`). - -use bxcan; -use bxcan::Interrupts; -use core::future::Future; -use embassy::interrupt::Interrupt; -use embassy::util::InterruptFuture; -use nb; -use nb::block; - -use crate::interrupt; - -/// Interface to the Serial peripheral -pub struct Can { - can: bxcan::Can, - tx_int: T::TInterrupt, - rx_int: T::RInterrupt, -} - -impl Can { - pub fn new(mut can: bxcan::Can, tx_int: T::TInterrupt, rx_int: T::RInterrupt) -> Self { - // Sync to the bus and start normal operation. - can.enable_interrupts( - Interrupts::TRANSMIT_MAILBOX_EMPTY | Interrupts::FIFO0_MESSAGE_PENDING, - ); - block!(can.enable()).unwrap(); - - Can { - can: can, - tx_int: tx_int, - rx_int: rx_int, - } - } - - /// Sends can frame. - /// - /// This method async-blocks until the frame is transmitted. - pub fn transmit<'a>(&'a mut self, frame: &'a bxcan::Frame) -> impl Future + 'a { - async move { - let fut = InterruptFuture::new(&mut self.tx_int); - // Infallible - self.can.transmit(frame).unwrap(); - - fut.await; - } - } - - /// Receive can frame. - /// - /// This method async-blocks until the frame is received. - pub fn receive<'a>(&'a mut self) -> impl Future + 'a { - async move { - let mut frame: Option; - - loop { - let fut = InterruptFuture::new(&mut self.rx_int); - frame = match self.can.receive() { - Ok(frame) => Some(frame), - Err(nb::Error::WouldBlock) => None, - Err(nb::Error::Other(_)) => None, // Ignore overrun errors. - }; - if frame.is_some() { - break; - } - fut.await; - } - - frame.unwrap() - } - } -} - -mod private { - pub trait Sealed {} -} - -pub trait Instance: bxcan::Instance + private::Sealed { - type TInterrupt: Interrupt; - type RInterrupt: Interrupt; -} - -macro_rules! can { - ($($can:ident => ($tint:ident, $rint:ident),)+) => { - $( - impl private::Sealed for crate::hal::can::Can {} - impl Instance for crate::hal::can::Can { - type TInterrupt = interrupt::$tint; - type RInterrupt = interrupt::$rint; - } - )+ - } -} - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -can! { - CAN1 => (CAN1_TX, CAN1_RX0), - CAN2 => (CAN2_TX, CAN2_RX0), -} diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs deleted file mode 100644 index 3d83c2d5..00000000 --- a/embassy-stm32/src/exti.rs +++ /dev/null @@ -1,790 +0,0 @@ -use core::future::Future; -use core::mem; -use cortex_m; - -use crate::hal::gpio; - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -use crate::hal::syscfg::SysCfg; - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -use crate::hal::syscfg::SYSCFG as SysCfg; - -use embassy::traits::gpio::{ - WaitForAnyEdge, WaitForFallingEdge, WaitForHigh, WaitForLow, WaitForRisingEdge, -}; -use embassy::util::InterruptFuture; - -use embedded_hal::digital::v2 as digital; - -use crate::interrupt; - -pub struct ExtiPin { - pin: T, - interrupt: T::Interrupt, -} - -impl ExtiPin { - pub fn new(mut pin: T, interrupt: T::Interrupt, syscfg: &mut SysCfg) -> Self { - critical_section::with(|_| { - pin.make_source(syscfg); - }); - - Self { pin, interrupt } - } -} - -impl digital::OutputPin for ExtiPin { - type Error = T::Error; - - fn set_low(&mut self) -> Result<(), Self::Error> { - self.pin.set_low() - } - - fn set_high(&mut self) -> Result<(), Self::Error> { - self.pin.set_high() - } -} - -impl digital::StatefulOutputPin for ExtiPin { - fn is_set_low(&self) -> Result { - self.pin.is_set_low() - } - - fn is_set_high(&self) -> Result { - self.pin.is_set_high() - } -} - -impl digital::ToggleableOutputPin for ExtiPin { - type Error = T::Error; - - fn toggle(&mut self) -> Result<(), Self::Error> { - self.pin.toggle() - } -} - -impl digital::InputPin for ExtiPin { - type Error = T::Error; - - fn is_high(&self) -> Result { - self.pin.is_high() - } - - fn is_low(&self) -> Result { - self.pin.is_low() - } -} - -impl ExtiPin { - fn wait_for_state<'a>(&'a mut self, state: bool) -> impl Future + 'a { - async move { - let fut = InterruptFuture::new(&mut self.interrupt); - let pin = &mut self.pin; - critical_section::with(|_| { - pin.trigger_edge(if state { - EdgeOption::Rising - } else { - EdgeOption::Falling - }); - }); - - if (state && self.pin.is_high().unwrap_or(false)) - || (!state && self.pin.is_low().unwrap_or(false)) - { - return; - } - - fut.await; - - self.pin.clear_pending_bit(); - } - } -} - -impl ExtiPin { - fn wait_for_edge<'a>(&'a mut self, state: EdgeOption) -> impl Future + 'a { - self.pin.clear_pending_bit(); - async move { - let fut = InterruptFuture::new(&mut self.interrupt); - let pin = &mut self.pin; - critical_section::with(|_| { - pin.trigger_edge(state); - }); - - fut.await; - - self.pin.clear_pending_bit(); - } - } -} - -impl WaitForHigh for ExtiPin { - type Future<'a> = impl Future + 'a; - - fn wait_for_high<'a>(&'a mut self) -> Self::Future<'a> { - self.wait_for_state(true) - } -} - -impl WaitForLow for ExtiPin { - type Future<'a> = impl Future + 'a; - - fn wait_for_low<'a>(&'a mut self) -> Self::Future<'a> { - self.wait_for_state(false) - } -} - -/* - Irq Handler Description - EXTI0_IRQn EXTI0_IRQHandler Handler for pins connected to line 0 - EXTI1_IRQn EXTI1_IRQHandler Handler for pins connected to line 1 - EXTI2_IRQn EXTI2_IRQHandler Handler for pins connected to line 2 - EXTI3_IRQn EXTI3_IRQHandler Handler for pins connected to line 3 - EXTI4_IRQn EXTI4_IRQHandler Handler for pins connected to line 4 - EXTI9_5_IRQn EXTI9_5_IRQHandler Handler for pins connected to line 5 to 9 - EXTI15_10_IRQn EXTI15_10_IRQHandler Handler for pins connected to line 10 to 15 -*/ - -impl WaitForRisingEdge for ExtiPin { - type Future<'a> = impl Future + 'a; - - fn wait_for_rising_edge<'a>(&'a mut self) -> Self::Future<'a> { - self.wait_for_edge(EdgeOption::Rising) - } -} - -impl WaitForFallingEdge for ExtiPin { - type Future<'a> = impl Future + 'a; - - fn wait_for_falling_edge<'a>(&'a mut self) -> Self::Future<'a> { - self.wait_for_edge(EdgeOption::Falling) - } -} - -impl WaitForAnyEdge for ExtiPin { - type Future<'a> = impl Future + 'a; - - fn wait_for_any_edge<'a>(&'a mut self) -> Self::Future<'a> { - self.wait_for_edge(EdgeOption::RisingFalling) - } -} - -mod private { - pub trait Sealed {} -} - -#[derive(Copy, Clone)] -pub enum EdgeOption { - Rising, - Falling, - RisingFalling, -} - -pub trait WithInterrupt: private::Sealed { - type Interrupt: interrupt::Interrupt; -} - -pub trait Instance: WithInterrupt { - fn make_source(&mut self, syscfg: &mut SysCfg); - fn clear_pending_bit(&mut self); - fn trigger_edge(&mut self, edge: EdgeOption); -} - -macro_rules! exti { - ($set:ident, [ - $($INT:ident => $pin:ident,)+ - ]) => { - $( - impl private::Sealed for gpio::$set::$pin {} - impl WithInterrupt for gpio::$set::$pin { - type Interrupt = interrupt::$INT; - } - - #[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", - ))] - impl Instance for gpio::$set::$pin> { - fn make_source(&mut self, syscfg: &mut SysCfg) { - use crate::hal::gpio::ExtiPin; - self.make_interrupt_source(syscfg); - } - - fn clear_pending_bit(&mut self) { - use crate::hal::{gpio::Edge, gpio::ExtiPin, syscfg::SysCfg}; - - self.clear_interrupt_pending_bit(); - } - - fn trigger_edge(&mut self, edge: EdgeOption) { - use crate::hal::{gpio::Edge, gpio::ExtiPin, syscfg::SysCfg}; - use crate::pac::EXTI; - let mut exti: EXTI = unsafe { mem::transmute(()) }; - let edge = match edge { - EdgeOption::Falling => Edge::FALLING, - EdgeOption::Rising => Edge::RISING, - EdgeOption::RisingFalling => Edge::RISING_FALLING, - }; - self.trigger_on_edge(&mut exti, edge); - self.enable_interrupt(&mut exti); - } - } - - #[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] - impl Instance for gpio::$set::$pin { - fn make_source(&mut self, syscfg: &mut SysCfg) {} - - fn clear_pending_bit(&mut self) { - use crate::hal::{ - exti::{Exti, ExtiLine, GpioLine, TriggerEdge}, - syscfg::SYSCFG, - }; - - Exti::unpend(GpioLine::from_raw_line(self.pin_number()).unwrap()); - } - - fn trigger_edge(&mut self, edge: EdgeOption) { - use crate::hal::{ - exti::{Exti, ExtiLine, GpioLine, TriggerEdge}, - syscfg::SYSCFG, - }; - - use crate::pac::EXTI; - - let edge = match edge { - EdgeOption::Falling => TriggerEdge::Falling, - EdgeOption::Rising => TriggerEdge::Rising, - EdgeOption::RisingFalling => TriggerEdge::Both, - }; - - let exti: EXTI = unsafe { mem::transmute(()) }; - let mut exti = Exti::new(exti); - let port = self.port(); - let mut syscfg: SYSCFG = unsafe { mem::transmute(()) }; - let line = GpioLine::from_raw_line(self.pin_number()).unwrap(); - exti.listen_gpio(&mut syscfg, port, line, edge); - } - } - )+ - }; -} - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpioa, [ - EXTI0 => PA0, - EXTI1 => PA1, - EXTI2 => PA2, - EXTI3 => PA3, - EXTI4 => PA4, - EXTI9_5 => PA5, - EXTI9_5 => PA6, - EXTI9_5 => PA7, - EXTI9_5 => PA8, - EXTI9_5 => PA9, - EXTI15_10 => PA10, - EXTI15_10 => PA11, - EXTI15_10 => PA12, - EXTI15_10 => PA13, - EXTI15_10 => PA14, - EXTI15_10 => PA15, -]); - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpiob, [ - EXTI0 => PB0, - EXTI1 => PB1, - EXTI2 => PB2, - EXTI3 => PB3, - EXTI4 => PB4, - EXTI9_5 => PB5, - EXTI9_5 => PB6, - EXTI9_5 => PB7, - EXTI9_5 => PB8, - EXTI9_5 => PB9, - EXTI15_10 => PB10, - EXTI15_10 => PB11, - EXTI15_10 => PB12, - EXTI15_10 => PB13, - EXTI15_10 => PB14, - EXTI15_10 => PB15, -]); - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpioc, [ - EXTI0 => PC0, - EXTI1 => PC1, - EXTI2 => PC2, - EXTI3 => PC3, - EXTI4 => PC4, - EXTI9_5 => PC5, - EXTI9_5 => PC6, - EXTI9_5 => PC7, - EXTI9_5 => PC8, - EXTI9_5 => PC9, - EXTI15_10 => PC10, - EXTI15_10 => PC11, - EXTI15_10 => PC12, - EXTI15_10 => PC13, - EXTI15_10 => PC14, - EXTI15_10 => PC15, -]); - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpiod, [ - EXTI0 => PD0, - EXTI1 => PD1, - EXTI2 => PD2, - EXTI3 => PD3, - EXTI4 => PD4, - EXTI9_5 => PD5, - EXTI9_5 => PD6, - EXTI9_5 => PD7, - EXTI9_5 => PD8, - EXTI9_5 => PD9, - EXTI15_10 => PD10, - EXTI15_10 => PD11, - EXTI15_10 => PD12, - EXTI15_10 => PD13, - EXTI15_10 => PD14, - EXTI15_10 => PD15, -]); - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpioe, [ - EXTI0 => PE0, - EXTI1 => PE1, - EXTI2 => PE2, - EXTI3 => PE3, - EXTI4 => PE4, - EXTI9_5 => PE5, - EXTI9_5 => PE6, - EXTI9_5 => PE7, - EXTI9_5 => PE8, - EXTI9_5 => PE9, - EXTI15_10 => PE10, - EXTI15_10 => PE11, - EXTI15_10 => PE12, - EXTI15_10 => PE13, - EXTI15_10 => PE14, - EXTI15_10 => PE15, -]); - -#[cfg(any( - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpiof, [ - EXTI0 => PF0, - EXTI1 => PF1, - EXTI2 => PF2, - EXTI3 => PF3, - EXTI4 => PF4, - EXTI9_5 => PF5, - EXTI9_5 => PF6, - EXTI9_5 => PF7, - EXTI9_5 => PF8, - EXTI9_5 => PF9, - EXTI15_10 => PF10, - EXTI15_10 => PF11, - EXTI15_10 => PF12, - EXTI15_10 => PF13, - EXTI15_10 => PF14, - EXTI15_10 => PF15, -]); - -#[cfg(any( - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpiog, [ - EXTI0 => PG0, - EXTI1 => PG1, - EXTI2 => PG2, - EXTI3 => PG3, - EXTI4 => PG4, - EXTI9_5 => PG5, - EXTI9_5 => PG6, - EXTI9_5 => PG7, - EXTI9_5 => PG8, - EXTI9_5 => PG9, - EXTI15_10 => PG10, - EXTI15_10 => PG11, - EXTI15_10 => PG12, - EXTI15_10 => PG13, - EXTI15_10 => PG14, - EXTI15_10 => PG15, -]); - -#[cfg(any( - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpioh, [ - EXTI0 => PH0, - EXTI1 => PH1, - EXTI2 => PH2, - EXTI3 => PH3, - EXTI4 => PH4, - EXTI9_5 => PH5, - EXTI9_5 => PH6, - EXTI9_5 => PH7, - EXTI9_5 => PH8, - EXTI9_5 => PH9, - EXTI15_10 => PH10, - EXTI15_10 => PH11, - EXTI15_10 => PH12, - EXTI15_10 => PH13, - EXTI15_10 => PH14, - EXTI15_10 => PH15, -]); - -#[cfg(any(feature = "stm32f401"))] -exti!(gpioh, [ - EXTI0 => PH0, - EXTI1 => PH1, -]); - -#[cfg(any( - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpioi, [ - EXTI0 => PI0, - EXTI1 => PI1, - EXTI2 => PI2, - EXTI3 => PI3, - EXTI4 => PI4, - EXTI9_5 => PI5, - EXTI9_5 => PI6, - EXTI9_5 => PI7, - EXTI9_5 => PI8, - EXTI9_5 => PI9, - EXTI15_10 => PI10, - EXTI15_10 => PI11, - EXTI15_10 => PI12, - EXTI15_10 => PI13, - EXTI15_10 => PI14, - EXTI15_10 => PI15, -]); - -#[cfg(any( - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpioj, [ - EXTI0 => PJ0, - EXTI1 => PJ1, - EXTI2 => PJ2, - EXTI3 => PJ3, - EXTI4 => PJ4, - EXTI9_5 => PJ5, - EXTI9_5 => PJ6, - EXTI9_5 => PJ7, - EXTI9_5 => PJ8, - EXTI9_5 => PJ9, - EXTI15_10 => PJ10, - EXTI15_10 => PJ11, - EXTI15_10 => PJ12, - EXTI15_10 => PJ13, - EXTI15_10 => PJ14, - EXTI15_10 => PJ15, -]); - -#[cfg(any( - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f469", - feature = "stm32f479" -))] -exti!(gpiok, [ - EXTI0 => PK0, - EXTI1 => PK1, - EXTI2 => PK2, - EXTI3 => PK3, - EXTI4 => PK4, - EXTI9_5 => PK5, - EXTI9_5 => PK6, - EXTI9_5 => PK7, -]); - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -exti!(gpioa, [ - EXTI0_1 => PA0, - EXTI0_1 => PA1, - EXTI2_3 => PA2, - EXTI2_3 => PA3, - EXTI4_15 => PA4, - EXTI4_15 => PA5, - EXTI4_15 => PA6, - EXTI4_15 => PA7, - EXTI4_15 => PA8, - EXTI4_15 => PA9, - EXTI4_15 => PA10, - EXTI4_15 => PA11, - EXTI4_15 => PA12, - EXTI4_15 => PA13, - EXTI4_15 => PA14, - EXTI4_15 => PA15, -]); - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -exti!(gpiob, [ - EXTI0_1 => PB0, - EXTI0_1 => PB1, - EXTI2_3 => PB2, - EXTI2_3 => PB3, - EXTI4_15 => PB4, - EXTI4_15 => PB5, - EXTI4_15 => PB6, - EXTI4_15 => PB7, - EXTI4_15 => PB8, - EXTI4_15 => PB9, - EXTI4_15 => PB10, - EXTI4_15 => PB11, - EXTI4_15 => PB12, - EXTI4_15 => PB13, - EXTI4_15 => PB14, - EXTI4_15 => PB15, -]); - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -exti!(gpioc, [ - EXTI0_1 => PC0, - EXTI0_1 => PC1, - EXTI2_3 => PC2, - EXTI2_3 => PC3, - EXTI4_15 => PC4, - EXTI4_15 => PC5, - EXTI4_15 => PC6, - EXTI4_15 => PC7, - EXTI4_15 => PC8, - EXTI4_15 => PC9, - EXTI4_15 => PC10, - EXTI4_15 => PC11, - EXTI4_15 => PC12, - EXTI4_15 => PC13, - EXTI4_15 => PC14, - EXTI4_15 => PC15, -]); - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -exti!(gpiod, [ - EXTI0_1 => PD0, - EXTI0_1 => PD1, - EXTI2_3 => PD2, - EXTI2_3 => PD3, - EXTI4_15 => PD4, - EXTI4_15 => PD5, - EXTI4_15 => PD6, - EXTI4_15 => PD7, - EXTI4_15 => PD8, - EXTI4_15 => PD9, - EXTI4_15 => PD10, - EXTI4_15 => PD11, - EXTI4_15 => PD12, - EXTI4_15 => PD13, - EXTI4_15 => PD14, - EXTI4_15 => PD15, -]); - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -exti!(gpioe, [ - EXTI0_1 => PE0, - EXTI0_1 => PE1, - EXTI2_3 => PE2, - EXTI2_3 => PE3, - EXTI4_15 => PE4, - EXTI4_15 => PE5, - EXTI4_15 => PE6, - EXTI4_15 => PE7, - EXTI4_15 => PE8, - EXTI4_15 => PE9, - EXTI4_15 => PE10, - EXTI4_15 => PE11, - EXTI4_15 => PE12, - EXTI4_15 => PE13, - EXTI4_15 => PE14, - EXTI4_15 => PE15, -]); - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -exti!(gpioh, [ - EXTI0_1 => PH0, - EXTI0_1 => PH1, - EXTI4_15 => PH9, - EXTI4_15 => PH10, -]); diff --git a/embassy-stm32/src/f4/mod.rs b/embassy-stm32/src/f4/mod.rs deleted file mode 100644 index 9549b3ed..00000000 --- a/embassy-stm32/src/f4/mod.rs +++ /dev/null @@ -1,4 +0,0 @@ -pub mod rtc; -pub mod serial; -pub mod spi; -pub mod system; diff --git a/embassy-stm32/src/f4/rtc.rs b/embassy-stm32/src/f4/rtc.rs deleted file mode 100644 index df7a82d8..00000000 --- a/embassy-stm32/src/f4/rtc.rs +++ /dev/null @@ -1,505 +0,0 @@ -use crate::hal::bb; -use crate::hal::rcc::Clocks; -use core::cell::Cell; -use core::convert::TryInto; -use core::sync::atomic::{compiler_fence, AtomicU32, Ordering}; -use critical_section::CriticalSection; -use embassy::interrupt::InterruptExt; -use embassy::time::{Clock, TICKS_PER_SECOND}; -use embassy::util::CriticalSectionMutex as Mutex; - -use crate::interrupt; -use crate::interrupt::Interrupt; - -// RTC timekeeping works with something we call "periods", which are time intervals -// of 2^15 ticks. The RTC counter value is 16 bits, so one "overflow cycle" is 2 periods. -// -// A `period` count is maintained in parallel to the RTC hardware `counter`, like this: -// - `period` and `counter` start at 0 -// - `period` is incremented on overflow (at counter value 0) -// - `period` is incremented "midway" between overflows (at counter value 0x8000) -// -// Therefore, when `period` is even, counter is in 0..0x7FFF. When odd, counter is in 0x8000..0xFFFF -// This allows for now() to return the correct value even if it races an overflow. -// -// To get `now()`, `period` is read first, then `counter` is read. If the counter value matches -// the expected range for the `period` parity, we're done. If it doesn't, this means that -// a new period start has raced us between reading `period` and `counter`, so we assume the `counter` value -// corresponds to the next period. -// -// `period` is a 32bit integer, so It overflows on 2^32 * 2^15 / 32768 seconds of uptime, which is 136 years. -fn calc_now(period: u32, counter: u16) -> u64 { - ((period as u64) << 15) + ((counter as u32 ^ ((period & 1) << 15)) as u64) -} - -struct AlarmState { - timestamp: Cell, - callback: Cell>, -} - -impl AlarmState { - fn new() -> Self { - Self { - timestamp: Cell::new(u64::MAX), - callback: Cell::new(None), - } - } -} - -// TODO: This is sometimes wasteful, try to find a better way -const ALARM_COUNT: usize = 3; - -/// RTC timer that can be used by the executor and to set alarms. -/// -/// It can work with Timers 2, 3, 4, 5, 9 and 12. Timers 9 and 12 only have one alarm available, -/// while the others have three each. -/// This timer works internally with a unit of 2^15 ticks, which means that if a call to -/// [`embassy::time::Clock::now`] is blocked for that amount of ticks the returned value will be -/// wrong (an old value). The current default tick rate is 32768 ticks per second. -pub struct RTC { - rtc: T, - irq: T::Interrupt, - - /// Number of 2^23 periods elapsed since boot. - period: AtomicU32, - - /// Timestamp at which to fire alarm. u64::MAX if no alarm is scheduled. - alarms: Mutex<[AlarmState; ALARM_COUNT]>, - - clocks: Clocks, -} - -impl RTC { - pub fn new(rtc: T, irq: T::Interrupt, clocks: Clocks) -> Self { - Self { - rtc, - irq, - period: AtomicU32::new(0), - alarms: Mutex::new([AlarmState::new(), AlarmState::new(), AlarmState::new()]), - clocks, - } - } - - pub fn start(&'static self) { - self.rtc.enable_clock(); - self.rtc.stop_and_reset(); - - let multiplier = if T::ppre(&self.clocks) == 1 { 1 } else { 2 }; - let freq = T::pclk(&self.clocks) * multiplier; - let psc = freq / TICKS_PER_SECOND as u32 - 1; - let psc: u16 = psc.try_into().unwrap(); - - self.rtc.set_psc_arr(psc, u16::MAX); - // Mid-way point - self.rtc.set_compare(0, 0x8000); - self.rtc.set_compare_interrupt(0, true); - - self.irq.set_handler(|ptr| unsafe { - let this = &*(ptr as *const () as *const Self); - this.on_interrupt(); - }); - self.irq.set_handler_context(self as *const _ as *mut _); - self.irq.unpend(); - self.irq.enable(); - - self.rtc.start(); - } - - fn on_interrupt(&self) { - if self.rtc.overflow_interrupt_status() { - self.rtc.overflow_clear_flag(); - self.next_period(); - } - - // Half overflow - if self.rtc.compare_interrupt_status(0) { - self.rtc.compare_clear_flag(0); - self.next_period(); - } - - for n in 1..=ALARM_COUNT { - if self.rtc.compare_interrupt_status(n) { - self.rtc.compare_clear_flag(n); - critical_section::with(|cs| self.trigger_alarm(n, cs)); - } - } - } - - fn next_period(&self) { - critical_section::with(|cs| { - let period = self.period.fetch_add(1, Ordering::Relaxed) + 1; - let t = (period as u64) << 15; - - for n in 1..=ALARM_COUNT { - let alarm = &self.alarms.borrow(cs)[n - 1]; - let at = alarm.timestamp.get(); - - let diff = at - t; - if diff < 0xc000 { - self.rtc.set_compare(n, at as u16); - self.rtc.set_compare_interrupt(n, true); - } - } - }) - } - - fn trigger_alarm(&self, n: usize, cs: CriticalSection) { - self.rtc.set_compare_interrupt(n, false); - - let alarm = &self.alarms.borrow(cs)[n - 1]; - alarm.timestamp.set(u64::MAX); - - // Call after clearing alarm, so the callback can set another alarm. - if let Some((f, ctx)) = alarm.callback.get() { - f(ctx); - } - } - - fn set_alarm_callback(&self, n: usize, callback: fn(*mut ()), ctx: *mut ()) { - critical_section::with(|cs| { - let alarm = &self.alarms.borrow(cs)[n - 1]; - alarm.callback.set(Some((callback, ctx))); - }) - } - - fn set_alarm(&self, n: usize, timestamp: u64) { - critical_section::with(|cs| { - let alarm = &self.alarms.borrow(cs)[n - 1]; - alarm.timestamp.set(timestamp); - - let t = self.now(); - if timestamp <= t { - self.trigger_alarm(n, cs); - return; - } - - let diff = timestamp - t; - if diff < 0xc000 { - let safe_timestamp = timestamp.max(t + 3); - self.rtc.set_compare(n, safe_timestamp as u16); - self.rtc.set_compare_interrupt(n, true); - } else { - self.rtc.set_compare_interrupt(n, false); - } - }) - } - - pub fn alarm1(&'static self) -> Alarm { - Alarm { n: 1, rtc: self } - } - pub fn alarm2(&'static self) -> Option> { - if T::REAL_ALARM_COUNT >= 2 { - Some(Alarm { n: 2, rtc: self }) - } else { - None - } - } - pub fn alarm3(&'static self) -> Option> { - if T::REAL_ALARM_COUNT >= 3 { - Some(Alarm { n: 3, rtc: self }) - } else { - None - } - } -} - -impl embassy::time::Clock for RTC { - fn now(&self) -> u64 { - let period = self.period.load(Ordering::Relaxed); - compiler_fence(Ordering::Acquire); - let counter = self.rtc.counter(); - calc_now(period, counter) - } -} - -pub struct Alarm { - n: usize, - rtc: &'static RTC, -} - -impl embassy::time::Alarm for Alarm { - fn set_callback(&self, callback: fn(*mut ()), ctx: *mut ()) { - self.rtc.set_alarm_callback(self.n, callback, ctx); - } - - fn set(&self, timestamp: u64) { - self.rtc.set_alarm(self.n, timestamp); - } - - fn clear(&self) { - self.rtc.set_alarm(self.n, u64::MAX); - } -} - -mod sealed { - pub trait Sealed {} -} - -pub trait Instance: sealed::Sealed + Sized + 'static { - type Interrupt: Interrupt; - const REAL_ALARM_COUNT: usize; - - fn enable_clock(&self); - fn set_compare(&self, n: usize, value: u16); - fn set_compare_interrupt(&self, n: usize, enable: bool); - fn compare_interrupt_status(&self, n: usize) -> bool; - fn compare_clear_flag(&self, n: usize); - fn overflow_interrupt_status(&self) -> bool; - fn overflow_clear_flag(&self); - // This method should ensure that the values are really updated before returning - fn set_psc_arr(&self, psc: u16, arr: u16); - fn stop_and_reset(&self); - fn start(&self); - fn counter(&self) -> u16; - fn ppre(clocks: &Clocks) -> u8; - fn pclk(clocks: &Clocks) -> u32; -} - -#[allow(unused_macros)] -macro_rules! impl_timer { - ($module:ident: ($TYPE:ident, $INT:ident, $apbenr:ident, $enrbit:expr, $apbrstr:ident, $rstrbit:expr, $ppre:ident, $pclk: ident), 3) => { - mod $module { - use super::*; - use crate::hal::pac::{$TYPE, RCC}; - - impl sealed::Sealed for $TYPE {} - - impl Instance for $TYPE { - type Interrupt = interrupt::$INT; - const REAL_ALARM_COUNT: usize = 3; - - fn enable_clock(&self) { - // NOTE(unsafe) It will only be used for atomic operations - unsafe { - let rcc = &*RCC::ptr(); - - bb::set(&rcc.$apbenr, $enrbit); - bb::set(&rcc.$apbrstr, $rstrbit); - bb::clear(&rcc.$apbrstr, $rstrbit); - } - } - - fn set_compare(&self, n: usize, value: u16) { - // NOTE(unsafe) these registers accept all the range of u16 values - match n { - 0 => self.ccr1.write(|w| unsafe { w.bits(value.into()) }), - 1 => self.ccr2.write(|w| unsafe { w.bits(value.into()) }), - 2 => self.ccr3.write(|w| unsafe { w.bits(value.into()) }), - 3 => self.ccr4.write(|w| unsafe { w.bits(value.into()) }), - _ => {} - } - } - - fn set_compare_interrupt(&self, n: usize, enable: bool) { - if n > 3 { - return; - } - let bit = n as u8 + 1; - unsafe { - if enable { - bb::set(&self.dier, bit); - } else { - bb::clear(&self.dier, bit); - } - } - } - - fn compare_interrupt_status(&self, n: usize) -> bool { - let status = self.sr.read(); - match n { - 0 => status.cc1if().bit_is_set(), - 1 => status.cc2if().bit_is_set(), - 2 => status.cc3if().bit_is_set(), - 3 => status.cc4if().bit_is_set(), - _ => false, - } - } - - fn compare_clear_flag(&self, n: usize) { - if n > 3 { - return; - } - let bit = n as u8 + 1; - unsafe { - bb::clear(&self.sr, bit); - } - } - - fn overflow_interrupt_status(&self) -> bool { - self.sr.read().uif().bit_is_set() - } - - fn overflow_clear_flag(&self) { - unsafe { - bb::clear(&self.sr, 0); - } - } - - fn set_psc_arr(&self, psc: u16, arr: u16) { - // NOTE(unsafe) All u16 values are valid - self.psc.write(|w| unsafe { w.bits(psc.into()) }); - self.arr.write(|w| unsafe { w.bits(arr.into()) }); - - unsafe { - // Set URS, generate update, clear URS - bb::set(&self.cr1, 2); - self.egr.write(|w| w.ug().set_bit()); - bb::clear(&self.cr1, 2); - } - } - - fn stop_and_reset(&self) { - unsafe { - bb::clear(&self.cr1, 0); - } - self.cnt.reset(); - } - - fn start(&self) { - unsafe { bb::set(&self.cr1, 0) } - } - - fn counter(&self) -> u16 { - self.cnt.read().bits() as u16 - } - - fn ppre(clocks: &Clocks) -> u8 { - clocks.$ppre() - } - - fn pclk(clocks: &Clocks) -> u32 { - clocks.$pclk().0 - } - } - } - }; - - ($module:ident: ($TYPE:ident, $INT:ident, $apbenr:ident, $enrbit:expr, $apbrstr:ident, $rstrbit:expr, $ppre:ident, $pclk: ident), 1) => { - mod $module { - use super::*; - use crate::hal::pac::{$TYPE, RCC}; - - impl sealed::Sealed for $TYPE {} - - impl Instance for $TYPE { - type Interrupt = interrupt::$INT; - const REAL_ALARM_COUNT: usize = 1; - - fn enable_clock(&self) { - // NOTE(unsafe) It will only be used for atomic operations - unsafe { - let rcc = &*RCC::ptr(); - - bb::set(&rcc.$apbenr, $enrbit); - bb::set(&rcc.$apbrstr, $rstrbit); - bb::clear(&rcc.$apbrstr, $rstrbit); - } - } - - fn set_compare(&self, n: usize, value: u16) { - // NOTE(unsafe) these registers accept all the range of u16 values - match n { - 0 => self.ccr1.write(|w| unsafe { w.bits(value.into()) }), - 1 => self.ccr2.write(|w| unsafe { w.bits(value.into()) }), - _ => {} - } - } - - fn set_compare_interrupt(&self, n: usize, enable: bool) { - if n > 1 { - return; - } - let bit = n as u8 + 1; - unsafe { - if enable { - bb::set(&self.dier, bit); - } else { - bb::clear(&self.dier, bit); - } - } - } - - fn compare_interrupt_status(&self, n: usize) -> bool { - let status = self.sr.read(); - match n { - 0 => status.cc1if().bit_is_set(), - 1 => status.cc2if().bit_is_set(), - _ => false, - } - } - - fn compare_clear_flag(&self, n: usize) { - if n > 1 { - return; - } - let bit = n as u8 + 1; - unsafe { - bb::clear(&self.sr, bit); - } - } - - fn overflow_interrupt_status(&self) -> bool { - self.sr.read().uif().bit_is_set() - } - - fn overflow_clear_flag(&self) { - unsafe { - bb::clear(&self.sr, 0); - } - } - - fn set_psc_arr(&self, psc: u16, arr: u16) { - // NOTE(unsafe) All u16 values are valid - self.psc.write(|w| unsafe { w.bits(psc.into()) }); - self.arr.write(|w| unsafe { w.bits(arr.into()) }); - - unsafe { - // Set URS, generate update, clear URS - bb::set(&self.cr1, 2); - self.egr.write(|w| w.ug().set_bit()); - bb::clear(&self.cr1, 2); - } - } - - fn stop_and_reset(&self) { - unsafe { - bb::clear(&self.cr1, 0); - } - self.cnt.reset(); - } - - fn start(&self) { - unsafe { bb::set(&self.cr1, 0) } - } - - fn counter(&self) -> u16 { - self.cnt.read().bits() as u16 - } - - fn ppre(clocks: &Clocks) -> u8 { - clocks.$ppre() - } - - fn pclk(clocks: &Clocks) -> u32 { - clocks.$pclk().0 - } - } - } - }; -} - -#[cfg(not(feature = "stm32f410"))] -impl_timer!(tim2: (TIM2, TIM2, apb1enr, 0, apb1rstr, 0, ppre1, pclk1), 3); - -#[cfg(not(feature = "stm32f410"))] -impl_timer!(tim3: (TIM3, TIM3, apb1enr, 1, apb1rstr, 1, ppre1, pclk1), 3); - -#[cfg(not(feature = "stm32f410"))] -impl_timer!(tim4: (TIM4, TIM4, apb1enr, 2, apb1rstr, 2, ppre1, pclk1), 3); - -impl_timer!(tim5: (TIM5, TIM5, apb1enr, 3, apb1rstr, 3, ppre1, pclk1), 3); - -impl_timer!(tim9: (TIM9, TIM1_BRK_TIM9, apb2enr, 16, apb2rstr, 16, ppre2, pclk2), 1); - -#[cfg(not(any(feature = "stm32f401", feature = "stm32f410", feature = "stm32f411")))] -impl_timer!(tim12: (TIM12, TIM8_BRK_TIM12, apb1enr, 6, apb1rstr, 6, ppre1, pclk1), 1); diff --git a/embassy-stm32/src/f4/serial.rs b/embassy-stm32/src/f4/serial.rs deleted file mode 100644 index 78aaa894..00000000 --- a/embassy-stm32/src/f4/serial.rs +++ /dev/null @@ -1,357 +0,0 @@ -//! Async Serial. - -use core::future::Future; -use core::marker::PhantomData; -use embassy::interrupt::Interrupt; -use embassy::traits::uart::{Error, Read, ReadUntilIdle, Write}; -use embassy::util::InterruptFuture; -use futures::{select_biased, FutureExt}; - -use crate::hal::{ - dma, - dma::config::DmaConfig, - dma::traits::{Channel, DMASet, PeriAddress, Stream}, - dma::{MemoryToPeripheral, PeripheralToMemory, Transfer}, - rcc::Clocks, - serial, - serial::config::{Config as SerialConfig, DmaConfig as SerialDmaConfig}, - serial::{Event as SerialEvent, Pins}, -}; -use crate::interrupt; -use crate::pac; - -/// Interface to the Serial peripheral -pub struct Serial< - USART: PeriAddress + WithInterrupt, - TSTREAM: Stream + WithInterrupt, - RSTREAM: Stream + WithInterrupt, - CHANNEL: Channel, -> { - tx_stream: Option, - rx_stream: Option, - usart: Option, - tx_int: TSTREAM::Interrupt, - rx_int: RSTREAM::Interrupt, - usart_int: USART::Interrupt, - channel: PhantomData, -} - -// static mut INSTANCE: *const Serial, Stream2> = ptr::null_mut(); - -impl Serial -where - USART: serial::Instance - + PeriAddress - + DMASet - + DMASet - + WithInterrupt, - TSTREAM: Stream + WithInterrupt, - RSTREAM: Stream + WithInterrupt, - CHANNEL: Channel, -{ - // Leaking futures is forbidden! - pub unsafe fn new( - usart: USART, - streams: (TSTREAM, RSTREAM), - pins: PINS, - tx_int: TSTREAM::Interrupt, - rx_int: RSTREAM::Interrupt, - usart_int: USART::Interrupt, - mut config: SerialConfig, - clocks: Clocks, - ) -> Self - where - PINS: Pins, - { - config.dma = SerialDmaConfig::TxRx; - - let (usart, _) = serial::Serial::new(usart, pins, config, clocks) - .unwrap() - .release(); - - let (tx_stream, rx_stream) = streams; - - Serial { - tx_stream: Some(tx_stream), - rx_stream: Some(rx_stream), - usart: Some(usart), - tx_int: tx_int, - rx_int: rx_int, - usart_int: usart_int, - channel: PhantomData, - } - } -} - -impl Read for Serial -where - USART: serial::Instance - + PeriAddress - + DMASet - + DMASet - + WithInterrupt - + 'static, - TSTREAM: Stream + WithInterrupt + 'static, - RSTREAM: Stream + WithInterrupt + 'static, - CHANNEL: Channel + 'static, -{ - type ReadFuture<'a> = impl Future> + 'a; - - /// Receives serial data. - /// - /// The future is pending until the buffer is completely filled. - fn read<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReadFuture<'a> { - let static_buf = unsafe { core::mem::transmute::<&'a mut [u8], &'static mut [u8]>(buf) }; - - async move { - let rx_stream = self.rx_stream.take().unwrap(); - let usart = self.usart.take().unwrap(); - - let mut rx_transfer = Transfer::init( - rx_stream, - usart, - static_buf, - None, - DmaConfig::default() - .transfer_complete_interrupt(true) - .memory_increment(true) - .double_buffer(false), - ); - - let fut = InterruptFuture::new(&mut self.rx_int); - rx_transfer.start(|_usart| {}); - fut.await; - - let (rx_stream, usart, _, _) = rx_transfer.free(); - self.rx_stream.replace(rx_stream); - self.usart.replace(usart); - - Ok(()) - } - } -} - -impl Write for Serial -where - USART: serial::Instance - + PeriAddress - + DMASet - + DMASet - + WithInterrupt - + 'static, - TSTREAM: Stream + WithInterrupt + 'static, - RSTREAM: Stream + WithInterrupt + 'static, - CHANNEL: Channel + 'static, -{ - type WriteFuture<'a> = impl Future> + 'a; - - /// Sends serial data. - fn write<'a>(&'a mut self, buf: &'a [u8]) -> Self::WriteFuture<'a> { - #[allow(mutable_transmutes)] - let static_buf = unsafe { core::mem::transmute::<&'a [u8], &'static mut [u8]>(buf) }; - - async move { - let tx_stream = self.tx_stream.take().unwrap(); - let usart = self.usart.take().unwrap(); - - let mut tx_transfer = Transfer::init( - tx_stream, - usart, - static_buf, - None, - DmaConfig::default() - .transfer_complete_interrupt(true) - .memory_increment(true) - .double_buffer(false), - ); - - let fut = InterruptFuture::new(&mut self.tx_int); - - tx_transfer.start(|_usart| {}); - fut.await; - - let (tx_stream, usart, _buf, _) = tx_transfer.free(); - - self.tx_stream.replace(tx_stream); - self.usart.replace(usart); - - Ok(()) - } - } -} - -impl ReadUntilIdle for Serial -where - USART: serial::Instance - + PeriAddress - + DMASet - + DMASet - + WithInterrupt - + 'static, - TSTREAM: Stream + WithInterrupt + 'static, - RSTREAM: Stream + WithInterrupt + 'static, - CHANNEL: Channel + 'static, -{ - type ReadUntilIdleFuture<'a> = impl Future> + 'a; - - /// Receives serial data. - /// - /// The future is pending until either the buffer is completely full, or the RX line falls idle after receiving some data. - /// - /// Returns the number of bytes read. - fn read_until_idle<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReadUntilIdleFuture<'a> { - let static_buf = unsafe { core::mem::transmute::<&'a mut [u8], &'static mut [u8]>(buf) }; - - async move { - let rx_stream = self.rx_stream.take().unwrap(); - let usart = self.usart.take().unwrap(); - - unsafe { - /* __HAL_UART_ENABLE_IT(&uart->UartHandle, UART_IT_IDLE); */ - (*USART::ptr()).cr1.modify(|_, w| w.idleie().set_bit()); - - /* __HAL_UART_CLEAR_IDLEFLAG(&uart->UartHandle); */ - (*USART::ptr()).sr.read(); - (*USART::ptr()).dr.read(); - }; - - let mut rx_transfer = Transfer::init( - rx_stream, - usart, - static_buf, - None, - DmaConfig::default() - .transfer_complete_interrupt(true) - .memory_increment(true) - .double_buffer(false), - ); - - let total_bytes = RSTREAM::get_number_of_transfers() as usize; - - let fut = InterruptFuture::new(&mut self.rx_int); - let fut_idle = InterruptFuture::new(&mut self.usart_int); - - rx_transfer.start(|_usart| {}); - - futures::future::select(fut, fut_idle).await; - - let (rx_stream, usart, _, _) = rx_transfer.free(); - - let remaining_bytes = RSTREAM::get_number_of_transfers() as usize; - - unsafe { - (*USART::ptr()).cr1.modify(|_, w| w.idleie().clear_bit()); - } - self.rx_stream.replace(rx_stream); - self.usart.replace(usart); - - Ok(total_bytes - remaining_bytes) - } - } -} - -mod private { - pub trait Sealed {} -} - -pub trait WithInterrupt: private::Sealed { - type Interrupt: Interrupt; -} - -macro_rules! dma { - ($($PER:ident => ($dma:ident, $stream:ident),)+) => { - $( - impl private::Sealed for dma::$stream {} - impl WithInterrupt for dma::$stream { - type Interrupt = interrupt::$PER; - } - )+ - } - } - -macro_rules! usart { - ($($PER:ident => ($usart:ident),)+) => { - $( - impl private::Sealed for pac::$usart {} - impl WithInterrupt for pac::$usart { - type Interrupt = interrupt::$PER; - } - )+ - } -} - -dma! { - DMA2_STREAM0 => (DMA2, Stream0), - DMA2_STREAM1 => (DMA2, Stream1), - DMA2_STREAM2 => (DMA2, Stream2), - DMA2_STREAM3 => (DMA2, Stream3), - DMA2_STREAM4 => (DMA2, Stream4), - DMA2_STREAM5 => (DMA2, Stream5), - DMA2_STREAM6 => (DMA2, Stream6), - DMA2_STREAM7 => (DMA2, Stream7), - DMA1_STREAM0 => (DMA1, Stream0), - DMA1_STREAM1 => (DMA1, Stream1), - DMA1_STREAM2 => (DMA1, Stream2), - DMA1_STREAM3 => (DMA1, Stream3), - DMA1_STREAM4 => (DMA1, Stream4), - DMA1_STREAM5 => (DMA1, Stream5), - DMA1_STREAM6 => (DMA1, Stream6), -} - -#[cfg(any(feature = "stm32f401", feature = "stm32f410", feature = "stm32f411",))] -usart! { - USART1 => (USART1), - USART2 => (USART2), - USART6 => (USART6), -} - -#[cfg(any(feature = "stm32f405", feature = "stm32f407"))] -usart! { - USART1 => (USART1), - USART2 => (USART2), - USART3 => (USART3), - USART6 => (USART6), - - UART4 => (UART4), - UART5 => (UART5), -} - -#[cfg(feature = "stm32f412")] -usart! { - USART1 => (USART1), - USART2 => (USART2), - USART3 => (USART3), - USART6 => (USART6), -} - -#[cfg(feature = "stm32f413")] -usart! { - USART1 => (USART1), - USART2 => (USART2), - USART3 => (USART3), - USART6 => (USART6), - USART7 => (USART7), - USART8 => (USART8), - - UART5 => (UART5), - UART9 => (UART9), - UART10 => (UART10), -} - -#[cfg(any( - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f446", - feature = "stm32f469" -))] -usart! { - USART1 => (USART1), - USART2 => (USART2), - USART3 => (USART3), - USART6 => (USART6), - - UART4 => (UART4), - UART5 => (UART5), -// UART7 => (UART7), -// UART8 => (UART8), -} diff --git a/embassy-stm32/src/f4/spi.rs b/embassy-stm32/src/f4/spi.rs deleted file mode 100644 index d02c7810..00000000 --- a/embassy-stm32/src/f4/spi.rs +++ /dev/null @@ -1,492 +0,0 @@ -//! Async SPI - -use embassy::time; - -use core::{future::Future, marker::PhantomData, mem, ops::Deref, pin::Pin, ptr}; -use embassy::{interrupt::Interrupt, traits::spi::FullDuplex, util::InterruptFuture}; -use nb; - -pub use crate::hal::spi::{Mode, Phase, Polarity}; -use crate::hal::{ - bb, dma, - dma::config::DmaConfig, - dma::traits::{Channel, DMASet, PeriAddress, Stream}, - dma::{MemoryToPeripheral, PeripheralToMemory, Transfer}, - rcc::Clocks, - spi::Pins, - time::Hertz, -}; -use crate::interrupt; -use crate::pac; -use futures::future; - -#[derive(Debug, Clone, Copy, PartialEq, Eq)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -#[non_exhaustive] -pub enum Error { - TxBufferTooLong, - RxBufferTooLong, - Overrun, - ModeFault, - Crc, -} - -fn read_sr(spi: &T) -> nb::Result { - let sr = spi.sr.read(); - Err(if sr.ovr().bit_is_set() { - nb::Error::Other(Error::Overrun) - } else if sr.modf().bit_is_set() { - nb::Error::Other(Error::ModeFault) - } else if sr.crcerr().bit_is_set() { - nb::Error::Other(Error::Crc) - } else if sr.rxne().bit_is_set() { - // NOTE(read_volatile) read only 1 byte (the svd2rust API only allows - // reading a half-word) - return Ok(unsafe { ptr::read_volatile(&spi.dr as *const _ as *const u8) }); - } else { - nb::Error::WouldBlock - }) -} - -fn write_sr(spi: &T, byte: u8) -> nb::Result<(), Error> { - let sr = spi.sr.read(); - Err(if sr.ovr().bit_is_set() { - // Read from the DR to clear the OVR bit - let _ = spi.dr.read(); - nb::Error::Other(Error::Overrun) - } else if sr.modf().bit_is_set() { - // Write to CR1 to clear MODF - spi.cr1.modify(|_r, w| w); - nb::Error::Other(Error::ModeFault) - } else if sr.crcerr().bit_is_set() { - // Clear the CRCERR bit - spi.sr.modify(|_r, w| { - w.crcerr().clear_bit(); - w - }); - nb::Error::Other(Error::Crc) - } else if sr.txe().bit_is_set() { - // NOTE(write_volatile) see note above - unsafe { ptr::write_volatile(&spi.dr as *const _ as *mut u8, byte) } - return Ok(()); - } else { - nb::Error::WouldBlock - }) -} - -/// Interface to the Serial peripheral -pub struct Spi< - SPI: PeriAddress + WithInterrupt, - TSTREAM: Stream + WithInterrupt, - RSTREAM: Stream + WithInterrupt, - CHANNEL: Channel, -> { - tx_stream: Option, - rx_stream: Option, - spi: Option, - tx_int: TSTREAM::Interrupt, - rx_int: RSTREAM::Interrupt, - spi_int: SPI::Interrupt, - channel: PhantomData, -} - -impl Spi -where - SPI: Instance - + PeriAddress - + DMASet - + DMASet - + WithInterrupt, - TSTREAM: Stream + WithInterrupt, - RSTREAM: Stream + WithInterrupt, - CHANNEL: Channel, -{ - // Leaking futures is forbidden! - pub unsafe fn new( - spi: SPI, - streams: (TSTREAM, RSTREAM), - pins: PINS, - tx_int: TSTREAM::Interrupt, - rx_int: RSTREAM::Interrupt, - spi_int: SPI::Interrupt, - mode: Mode, - freq: Hertz, - clocks: Clocks, - ) -> Self - where - PINS: Pins, - { - let (tx_stream, rx_stream) = streams; - - // let spi1: crate::pac::SPI1 = unsafe { mem::transmute(()) }; - // let mut hspi = crate::hal::spi::Spi::spi1( - // spi1, - // ( - // crate::hal::spi::NoSck, - // crate::hal::spi::NoMiso, - // crate::hal::spi::NoMosi, - // ), - // mode, - // freq, - // clocks, - // ); - - unsafe { SPI::enable_clock() }; - - let clock = SPI::clock_speed(clocks); - - // disable SS output - // spi.cr2 - // .write(|w| w.ssoe().clear_bit().rxdmaen().set_bit().txdmaen().set_bit()); - spi.cr2.write(|w| w.ssoe().clear_bit()); - - let br = match clock.0 / freq.0 { - 0 => unreachable!(), - 1..=2 => 0b000, - 3..=5 => 0b001, - 6..=11 => 0b010, - 12..=23 => 0b011, - 24..=47 => 0b100, - 48..=95 => 0b101, - 96..=191 => 0b110, - _ => 0b111, - }; - - // mstr: master configuration - // lsbfirst: MSB first - // ssm: enable software slave management (NSS pin free for other uses) - // ssi: set nss high = master mode - // dff: 8 bit frames - // bidimode: 2-line unidirectional - // spe: enable the SPI bus - spi.cr1.write(|w| { - w.cpha() - .bit(mode.phase == Phase::CaptureOnSecondTransition) - .cpol() - .bit(mode.polarity == Polarity::IdleHigh) - .mstr() - .set_bit() - .br() - .bits(br) - .lsbfirst() - .clear_bit() - .ssm() - .set_bit() - .ssi() - .set_bit() - .rxonly() - .clear_bit() - .dff() - .clear_bit() - .bidimode() - .clear_bit() - .spe() - .set_bit() - }); - - Self { - tx_stream: Some(tx_stream), - rx_stream: Some(rx_stream), - spi: Some(spi), - tx_int: tx_int, - rx_int: rx_int, - spi_int: spi_int, - channel: PhantomData, - } - } -} - -impl FullDuplex for Spi -where - SPI: Instance - + PeriAddress - + DMASet - + DMASet - + WithInterrupt - + 'static, - TSTREAM: Stream + WithInterrupt + 'static, - RSTREAM: Stream + WithInterrupt + 'static, - CHANNEL: Channel + 'static, -{ - type Error = Error; - - type WriteFuture<'a> = impl Future> + 'a; - type ReadFuture<'a> = impl Future> + 'a; - type WriteReadFuture<'a> = impl Future> + 'a; - - fn read<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReadFuture<'a> { - #[allow(mutable_transmutes)] - let static_buf: &'static mut [u8] = unsafe { mem::transmute(buf) }; - - async move { - let rx_stream = self.rx_stream.take().unwrap(); - let spi = self.spi.take().unwrap(); - - spi.cr2.modify(|_, w| w.errie().set_bit()); - - let mut rx_transfer = Transfer::init( - rx_stream, - spi, - static_buf, - None, - DmaConfig::default() - .transfer_complete_interrupt(true) - .memory_increment(true) - .double_buffer(false), - ); - - let fut = InterruptFuture::new(&mut self.rx_int); - let fut_err = InterruptFuture::new(&mut self.spi_int); - - rx_transfer.start(|_spi| {}); - future::select(fut, fut_err).await; - - let (rx_stream, spi, _buf, _) = rx_transfer.free(); - - spi.cr2.modify(|_, w| w.errie().clear_bit()); - self.rx_stream.replace(rx_stream); - self.spi.replace(spi); - - Ok(()) - } - } - - fn write<'a>(&'a mut self, buf: &'a [u8]) -> Self::WriteFuture<'a> { - #[allow(mutable_transmutes)] - let static_buf: &'static mut [u8] = unsafe { mem::transmute(buf) }; - - async move { - let tx_stream = self.tx_stream.take().unwrap(); - let spi = self.spi.take().unwrap(); - - spi.cr2 - .modify(|_, w| w.errie().set_bit().txeie().set_bit().rxneie().set_bit()); - - // let mut tx_transfer = Transfer::init( - // tx_stream, - // spi, - // static_buf, - // None, - // DmaConfig::default() - // .transfer_complete_interrupt(true) - // .memory_increment(true) - // .double_buffer(false), - // ); - // - // let fut = InterruptFuture::new(&mut self.tx_int); - // - // tx_transfer.start(|_spi| {}); - // fut.await; - - // let (tx_stream, spi, _buf, _) = tx_transfer.free(); - - for i in 0..(static_buf.len() - 1) { - let byte = static_buf[i]; - loop { - match write_sr(&spi, byte) { - Ok(()) => break, - _ => {} - } - InterruptFuture::new(&mut self.spi_int).await; - } - } - - spi.cr2.modify(|_, w| { - w.errie() - .clear_bit() - .txeie() - .clear_bit() - .rxneie() - .clear_bit() - }); - self.tx_stream.replace(tx_stream); - self.spi.replace(spi); - - Ok(()) - } - } - - fn read_write<'a>( - &'a mut self, - read_buf: &'a mut [u8], - write_buf: &'a [u8], - ) -> Self::WriteReadFuture<'a> { - #[allow(mutable_transmutes)] - let write_static_buf: &'static mut [u8] = unsafe { mem::transmute(write_buf) }; - let read_static_buf: &'static mut [u8] = unsafe { mem::transmute(read_buf) }; - - async move { - let tx_stream = self.tx_stream.take().unwrap(); - let rx_stream = self.rx_stream.take().unwrap(); - let spi_tx = self.spi.take().unwrap(); - let spi_rx: SPI = unsafe { mem::transmute_copy(&spi_tx) }; - - spi_rx - .cr2 - .modify(|_, w| w.errie().set_bit().txeie().set_bit().rxneie().set_bit()); - - // let mut tx_transfer = Transfer::init( - // tx_stream, - // spi_tx, - // write_static_buf, - // None, - // DmaConfig::default() - // .transfer_complete_interrupt(true) - // .memory_increment(true) - // .double_buffer(false), - // ); - // - // let mut rx_transfer = Transfer::init( - // rx_stream, - // spi_rx, - // read_static_buf, - // None, - // DmaConfig::default() - // .transfer_complete_interrupt(true) - // .memory_increment(true) - // .double_buffer(false), - // ); - // - // let tx_fut = InterruptFuture::new(&mut self.tx_int); - // let rx_fut = InterruptFuture::new(&mut self.rx_int); - // let rx_fut_err = InterruptFuture::new(&mut self.spi_int); - // - // rx_transfer.start(|_spi| {}); - // tx_transfer.start(|_spi| {}); - // - // time::Timer::after(time::Duration::from_millis(500)).await; - // - // // tx_fut.await; - // // future::select(rx_fut, rx_fut_err).await; - // - // let (rx_stream, spi_rx, _buf, _) = rx_transfer.free(); - // let (tx_stream, _, _buf, _) = tx_transfer.free(); - - for i in 0..(read_static_buf.len() - 1) { - let byte = write_static_buf[i]; - loop { - let fut = InterruptFuture::new(&mut self.spi_int); - match write_sr(&spi_tx, byte) { - Ok(()) => break, - _ => {} - } - fut.await; - } - - loop { - let fut = InterruptFuture::new(&mut self.spi_int); - match read_sr(&spi_tx) { - Ok(byte) => { - read_static_buf[i] = byte; - break; - } - _ => {} - } - fut.await; - } - } - - spi_rx.cr2.modify(|_, w| { - w.errie() - .clear_bit() - .txeie() - .clear_bit() - .rxneie() - .clear_bit() - }); - self.rx_stream.replace(rx_stream); - self.tx_stream.replace(tx_stream); - self.spi.replace(spi_rx); - - Ok(()) - } - } -} - -mod private { - pub trait Sealed {} -} - -pub trait WithInterrupt: private::Sealed { - type Interrupt: Interrupt; -} - -pub trait Instance: Deref + private::Sealed { - unsafe fn enable_clock(); - fn clock_speed(clocks: Clocks) -> Hertz; -} - -macro_rules! dma { - ($($PER:ident => ($dma:ident, $stream:ident),)+) => { - $( - impl private::Sealed for dma::$stream {} - impl WithInterrupt for dma::$stream { - type Interrupt = interrupt::$PER; - } - )+ - } - } - -macro_rules! spi { - ($($PER:ident => ($SPI:ident, $pclkX:ident, $apbXenr:ident, $en:expr),)+) => { - $( - impl private::Sealed for pac::$SPI {} - impl Instance for pac::$SPI { - unsafe fn enable_clock() { - const EN_BIT: u8 = $en; - // NOTE(unsafe) self reference will only be used for atomic writes with no side effects. - let rcc = &(*pac::RCC::ptr()); - // Enable clock. - bb::set(&rcc.$apbXenr, EN_BIT); - // Stall the pipeline to work around erratum 2.1.13 (DM00037591) - cortex_m::asm::dsb(); - } - - fn clock_speed(clocks: Clocks) -> Hertz { - clocks.$pclkX() - } - } - impl WithInterrupt for pac::$SPI { - type Interrupt = interrupt::$PER; - } - )+ - } -} - -dma! { - DMA2_STREAM0 => (DMA2, Stream0), - DMA2_STREAM1 => (DMA2, Stream1), - DMA2_STREAM2 => (DMA2, Stream2), - DMA2_STREAM3 => (DMA2, Stream3), - DMA2_STREAM4 => (DMA2, Stream4), - DMA2_STREAM5 => (DMA2, Stream5), - DMA2_STREAM6 => (DMA2, Stream6), - DMA2_STREAM7 => (DMA2, Stream7), - DMA1_STREAM0 => (DMA1, Stream0), - DMA1_STREAM1 => (DMA1, Stream1), - DMA1_STREAM2 => (DMA1, Stream2), - DMA1_STREAM3 => (DMA1, Stream3), - DMA1_STREAM4 => (DMA1, Stream4), - DMA1_STREAM5 => (DMA1, Stream5), - DMA1_STREAM6 => (DMA1, Stream6), -} - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f446", -))] -spi! { - SPI1 => (SPI1, pclk2, apb2enr, 12), - SPI2 => (SPI2, pclk1, apb2enr, 14), -// SPI6 => (SPI6, pclk2, apb2enr, 21), - SPI4 => (SPI3, pclk2, apb2enr, 13), -// SPI5 => (SPI3, pclk2, apb2enr, 20), -} - -#[cfg(any(feature = "stm32f405", feature = "stm32f407"))] -spi! { - SPI1 => (SPI1, pclk2, apb2enr, 12), - SPI3 => (SPI3, pclk1, apb2enr, 15), -} diff --git a/embassy-stm32/src/f4/system.rs b/embassy-stm32/src/f4/system.rs deleted file mode 100644 index fb739272..00000000 --- a/embassy-stm32/src/f4/system.rs +++ /dev/null @@ -1,61 +0,0 @@ -use crate::{hal::prelude::*, pac, Peripherals}; - -#[derive(Default)] -pub struct Config { - pub use_hse: Option, - pub sysclk: Option, - pub pclk1: Option, - pub require_pll48clk: bool, -} - -impl Config { - pub fn new() -> Self { - Default::default() - } - - pub fn use_hse(mut self, freq: u32) -> Self { - self.use_hse = Some(freq); - self - } - - pub fn sysclk(mut self, freq: u32) -> Self { - self.sysclk = Some(freq); - self - } - - pub fn pclk1(mut self, freq: u32) -> Self { - self.pclk1 = Some(freq); - self - } - - pub fn require_pll48clk(mut self) -> Self { - self.require_pll48clk = true; - self - } -} - -/// safety: must only call once. -pub unsafe fn configure(config: Config) { - let dp = pac::Peripherals::take().unwrap(); - let mut cfgr = dp.RCC.constrain().cfgr; - - if let Some(hz) = config.use_hse { - cfgr = cfgr.use_hse(hz.mhz()); - }; - - if let Some(hz) = config.sysclk { - cfgr = cfgr.sysclk(hz.mhz()); - }; - - if let Some(hz) = config.pclk1 { - cfgr = cfgr.pclk1(hz.mhz()); - }; - - if config.require_pll48clk { - cfgr = cfgr.require_pll48clk(); - }; - - let clocks = cfgr.freeze(); - - unsafe { Peripherals::set_peripherals(clocks) }; -} diff --git a/embassy-stm32/src/fmt.rs b/embassy-stm32/src/fmt.rs deleted file mode 100644 index 160642cc..00000000 --- a/embassy-stm32/src/fmt.rs +++ /dev/null @@ -1,114 +0,0 @@ -#![macro_use] -#![allow(clippy::module_inception)] -#![allow(unused)] - -#[cfg(all(feature = "defmt", feature = "log"))] -compile_error!("You may not enable both `defmt` and `log` features."); - -pub use fmt::*; - -#[cfg(feature = "defmt")] -mod fmt { - pub use defmt::{ - assert, assert_eq, assert_ne, debug, debug_assert, debug_assert_eq, debug_assert_ne, error, - info, panic, todo, trace, unreachable, unwrap, warn, - }; -} - -#[cfg(feature = "log")] -mod fmt { - pub use core::{ - assert, assert_eq, assert_ne, debug_assert, debug_assert_eq, debug_assert_ne, panic, todo, - unreachable, - }; - pub use log::{debug, error, info, trace, warn}; -} - -#[cfg(not(any(feature = "defmt", feature = "log")))] -mod fmt { - #![macro_use] - - pub use core::{ - assert, assert_eq, assert_ne, debug_assert, debug_assert_eq, debug_assert_ne, panic, todo, - unreachable, - }; - - macro_rules! trace { - ($($msg:expr),+ $(,)?) => { - () - }; - } - - macro_rules! debug { - ($($msg:expr),+ $(,)?) => { - () - }; - } - - macro_rules! info { - ($($msg:expr),+ $(,)?) => { - () - }; - } - - macro_rules! warn { - ($($msg:expr),+ $(,)?) => { - () - }; - } - - macro_rules! error { - ($($msg:expr),+ $(,)?) => { - () - }; - } -} - -#[cfg(not(feature = "defmt"))] -macro_rules! unwrap { - ($arg:expr) => { - match $crate::fmt::Try::into_result($arg) { - ::core::result::Result::Ok(t) => t, - ::core::result::Result::Err(e) => { - ::core::panic!("unwrap of `{}` failed: {:?}", ::core::stringify!($arg), e); - } - } - }; - ($arg:expr, $($msg:expr),+ $(,)? ) => { - match $crate::fmt::Try::into_result($arg) { - ::core::result::Result::Ok(t) => t, - ::core::result::Result::Err(e) => { - ::core::panic!("unwrap of `{}` failed: {}: {:?}", ::core::stringify!($arg), ::core::format_args!($($msg,)*), e); - } - } - } -} - -#[derive(Debug, Copy, Clone, Eq, PartialEq)] -pub struct NoneError; - -pub trait Try { - type Ok; - type Error; - fn into_result(self) -> Result; -} - -impl Try for Option { - type Ok = T; - type Error = NoneError; - - #[inline] - fn into_result(self) -> Result { - self.ok_or(NoneError) - } -} - -impl Try for Result { - type Ok = T; - type Error = E; - - #[inline] - fn into_result(self) -> Self { - self - } -} diff --git a/embassy-stm32/src/interrupt.rs b/embassy-stm32/src/interrupt.rs deleted file mode 100644 index 76dea28f..00000000 --- a/embassy-stm32/src/interrupt.rs +++ /dev/null @@ -1,1042 +0,0 @@ -//! Interrupt management -//! -//! This module implements an API for managing interrupts compatible with -//! nrf_softdevice::interrupt. Intended for switching between the two at compile-time. - -// Re-exports -pub use embassy::interrupt::{declare, take, Interrupt}; -pub use embassy_extras::interrupt::Priority4 as Priority; - -#[cfg(feature = "stm32f401")] -mod irqs { - use super::*; - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(OTG_FS_WKUP); - declare!(DMA1_STREAM7); - declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(FPU); - declare!(SPI4); -} - -#[cfg(feature = "stm32f405")] -mod irqs { - use super::*; - declare!(WWDG); - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - // declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(CAN1_TX); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(OTG_FS_WKUP); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_UP_TIM13); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_CC); - declare!(DMA1_STREAM7); - // declare!(FMC); - declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(UART4); - declare!(UART5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(ETH); - declare!(ETH_WKUP); - declare!(CAN2_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_WKUP); - declare!(OTG_HS); - declare!(DCMI); - declare!(CRYP); - declare!(HASH_RNG); - declare!(FPU); - // declare!(UART7); - // declare!(UART8); - // declare!(SPI4); - // declare!(SPI5); - // declare!(SPI6); - // declare!(SAI1); - // declare!(LCD_TFT); - // declare!(LCD_TFT_1); - // declare!(DMA2D); -} - -#[cfg(feature = "stm32f407")] -mod irqs { - use super::*; - - declare!(WWDG); - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(CAN1_TX); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(OTG_FS_WKUP); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_UP_TIM13); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_CC); - declare!(DMA1_STREAM7); - declare!(FSMC); - declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(UART4); - declare!(UART5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(ETH); - declare!(ETH_WKUP); - declare!(CAN2_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_WKUP); - declare!(OTG_HS); - declare!(DCMI); - declare!(CRYP); - declare!(HASH_RNG); - declare!(FPU); - declare!(LCD_TFT); - declare!(LCD_TFT_1); -} - -#[cfg(feature = "stm32f410")] -mod irqs { - use super::*; - - declare!(WWDG); - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(PWM1_UP); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(DMA1_STREAM7); - declare!(TIM5); - declare!(TIM6_DAC1); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(EXTI19); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(EXTI20); - declare!(RNG); - declare!(FPU); - declare!(SPI5); - declare!(I2C4_EV); - declare!(I2C4_ER); - declare!(LPTIM1); -} - -#[cfg(feature = "stm32f411")] -mod irqs { - use super::*; - - declare!(WWDG); - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(OTG_FS_WKUP); - declare!(DMA1_STREAM7); - declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(FPU); - declare!(SPI4); - declare!(SPI5); -} - -#[cfg(feature = "stm32f412")] -mod irqs { - use super::*; - - declare!(WWDG); - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(CAN1_TX); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(OTG_FS_WKUP); - declare!(TIM12); - declare!(TIM13); - declare!(TIM14); - declare!(TIM8_CC); - declare!(DMA1_STREAM7); - declare!(FSMC); - declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(TIM6_DACUNDER); - declare!(TIM7); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(CAN2_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(HASH_RNG); - declare!(FPU); - declare!(SPI4); - declare!(SPI5); - declare!(QUAD_SPI); - declare!(I2CFMP1_EVENT); - declare!(I2CFMP1_ERROR); -} - -#[cfg(feature = "stm32f413")] -mod irqs { - use super::*; - - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(CAN1_TX); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EVT); - declare!(I2C1_ERR); - declare!(I2C2_EVT); - declare!(I2C2_ERR); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(EXTI15_10); - declare!(EXTI17_RTC_ALARM); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_UP_TIM13); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_CC); - declare!(DMA1_STREAM7); - declare!(FSMC); - declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(USART4); - declare!(UART5); - declare!(TIM6_GLB_IT_DAC1_DAC2); - declare!(TIM7); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(CAN2_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(CAN3_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CRYPTO); - declare!(RNG); - declare!(FPU); - declare!(USART7); - declare!(USART8); - declare!(SPI4); - declare!(SPI5); - declare!(SAI1); - declare!(UART9); - declare!(UART10); - declare!(QUADSPI); - declare!(I2CFMP1EVENT); - declare!(I2CFMP1ERROR); - declare!(LPTIM1_OR_IT_EIT_23); - declare!(DFSDM2_FILTER1); - declare!(DFSDM2_FILTER2); - declare!(DFSDM2_FILTER3); - declare!(DFSDM2_FILTER4); -} - -#[cfg(feature = "stm32f427")] -mod irqs { - use super::*; - - declare!(WWDG); - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(CAN1_TX); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(OTG_FS_WKUP); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_UP_TIM13); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_CC); - declare!(DMA1_STREAM7); - declare!(FMC); - declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(UART4); - declare!(UART5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(ETH); - declare!(ETH_WKUP); - declare!(CAN2_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_WKUP); - declare!(OTG_HS); - declare!(DCMI); - declare!(CRYP); - declare!(HASH_RNG); - declare!(FPU); - declare!(UART7); - declare!(UART8); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(LCD_TFT); - declare!(LCD_TFT_1); -} - -#[cfg(feature = "stm32f429")] -mod irqs { - use super::*; - - declare!(WWDG); - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(CAN1_TX); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(OTG_FS_WKUP); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_UP_TIM13); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_CC); - declare!(DMA1_STREAM7); - declare!(FMC); - declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(UART4); - declare!(UART5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(ETH); - declare!(ETH_WKUP); - declare!(CAN2_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_WKUP); - declare!(OTG_HS); - declare!(DCMI); - declare!(CRYP); - declare!(HASH_RNG); - declare!(FPU); - declare!(UART7); - declare!(UART8); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SAI1); - declare!(LCD_TFT); - declare!(LCD_TFT_1); - declare!(DMA2D); -} - -#[cfg(feature = "stm32f446")] -mod irqs { - use super::*; - - declare!(WWDG); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(CAN1_TX); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(OTG_FS_WKUP); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_UP_TIM13); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_CC); - declare!(DMA1_STREAM7); - declare!(FMC); - // declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(UART4); - declare!(UART5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(ETH); - declare!(ETH_WKUP); - declare!(CAN2_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(DCMI); - declare!(FPU); - declare!(UART7); - declare!(UART8); - declare!(SPI4); - declare!(LCD_TFT); - declare!(LCD_TFT_1); -} - -#[cfg(feature = "stm32f469")] -mod irqs { - use super::*; - - declare!(WWDG); - declare!(PVD); - declare!(TAMP_STAMP); - declare!(RTC_WKUP); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(DMA1_STREAM0); - declare!(DMA1_STREAM1); - declare!(DMA1_STREAM2); - declare!(DMA1_STREAM3); - declare!(DMA1_STREAM4); - declare!(DMA1_STREAM5); - declare!(DMA1_STREAM6); - declare!(ADC); - declare!(CAN1_TX); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(EXTI9_5); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_UP_TIM10); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_CC); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(I2C1_EV); - declare!(I2C1_ER); - declare!(I2C2_EV); - declare!(I2C2_ER); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(EXTI15_10); - declare!(RTC_ALARM); - declare!(OTG_FS_WKUP); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_UP_TIM13); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_CC); - declare!(DMA1_STREAM7); - declare!(FMC); - declare!(SDIO); - declare!(TIM5); - declare!(SPI3); - declare!(UART4); - declare!(UART5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(DMA2_STREAM0); - declare!(DMA2_STREAM1); - declare!(DMA2_STREAM2); - declare!(DMA2_STREAM3); - declare!(DMA2_STREAM4); - declare!(ETH); - declare!(ETH_WKUP); - declare!(CAN2_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(OTG_FS); - declare!(DMA2_STREAM5); - declare!(DMA2_STREAM6); - declare!(DMA2_STREAM7); - declare!(USART6); - declare!(I2C3_EV); - declare!(I2C3_ER); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_WKUP); - declare!(OTG_HS); - declare!(DCMI); - declare!(CRYP); - declare!(HASH_RNG); - declare!(FPU); - declare!(UART7); - declare!(UART8); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SAI1); - declare!(LCD_TFT); - declare!(LCD_TFT_1); - declare!(DMA2D); - declare!(QUADSPI); - declare!(DSIHOST); -} - -#[cfg(feature = "stm32l0x1")] -mod irqs { - use super::*; - declare!(WWDG); - declare!(PVD); - declare!(RTC); - declare!(FLASH); - declare!(RCC); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(DMA1_CHANNEL1); - declare!(DMA1_CHANNEL2_3); - declare!(DMA1_CHANNEL4_7); - declare!(ADC_COMP); - declare!(LPTIM1); - declare!(USART4_USART5); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(TIM21); - declare!(I2C3); - declare!(TIM22); - declare!(I2C1); - declare!(I2C2); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(AES_RNG_LPUART1); -} - -#[cfg(feature = "stm32l0x2")] -mod irqs { - use super::*; - declare!(WWDG); - declare!(PVD); - declare!(RTC); - declare!(RCC); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(TSC); - declare!(DMA1_CHANNEL1); - declare!(DMA1_CHANNEL2_3); - declare!(DMA1_CHANNEL4_7); - declare!(ADC_COMP); - declare!(LPTIM1); - declare!(USART4_USART5); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM21); - declare!(I2C3); - declare!(TIM22); - declare!(I2C1); - declare!(I2C2); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(AES_RNG_LPUART1); - declare!(USB); -} - -#[cfg(feature = "stm32l0x3")] -mod irqs { - use super::*; - declare!(WWDG); - declare!(PVD); - declare!(RTC); - declare!(RCC); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(TSC); - declare!(DMA1_CHANNEL1); - declare!(DMA1_CHANNEL2_3); - declare!(DMA1_CHANNEL4_7); - declare!(ADC_COMP); - declare!(LPTIM1); - declare!(USART4_USART5); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM21); - declare!(I2C3); - declare!(TIM22); - declare!(I2C1); - declare!(I2C2); - declare!(SPI1); - declare!(SPI2); - declare!(USART1); - declare!(USART2); - declare!(AES_RNG_LPUART1); - declare!(LCD); - declare!(USB); -} - -pub use irqs::*; diff --git a/embassy-stm32/src/l0/mod.rs b/embassy-stm32/src/l0/mod.rs deleted file mode 100644 index 53b44fe2..00000000 --- a/embassy-stm32/src/l0/mod.rs +++ /dev/null @@ -1,2 +0,0 @@ -pub mod rtc; -pub mod system; diff --git a/embassy-stm32/src/l0/rtc.rs b/embassy-stm32/src/l0/rtc.rs deleted file mode 100644 index fa5011d3..00000000 --- a/embassy-stm32/src/l0/rtc.rs +++ /dev/null @@ -1,372 +0,0 @@ -use crate::hal::rcc::Clocks; -use atomic_polyfill::{compiler_fence, AtomicU32, Ordering}; -use core::cell::Cell; -use core::convert::TryInto; -use critical_section::CriticalSection; -use embassy::interrupt::InterruptExt; -use embassy::time::{Clock, TICKS_PER_SECOND}; -use embassy::util::CriticalSectionMutex as Mutex; - -use crate::interrupt; -use crate::interrupt::Interrupt; - -// RTC timekeeping works with something we call "periods", which are time intervals -// of 2^15 ticks. The RTC counter value is 16 bits, so one "overflow cycle" is 2 periods. -// -// A `period` count is maintained in parallel to the RTC hardware `counter`, like this: -// - `period` and `counter` start at 0 -// - `period` is incremented on overflow (at counter value 0) -// - `period` is incremented "midway" between overflows (at counter value 0x8000) -// -// Therefore, when `period` is even, counter is in 0..0x7FFF. When odd, counter is in 0x8000..0xFFFF -// This allows for now() to return the correct value even if it races an overflow. -// -// To get `now()`, `period` is read first, then `counter` is read. If the counter value matches -// the expected range for the `period` parity, we're done. If it doesn't, this means that -// a new period start has raced us between reading `period` and `counter`, so we assume the `counter` value -// corresponds to the next period. -// -// `period` is a 32bit integer, so It overflows on 2^32 * 2^15 / 32768 seconds of uptime, which is 136 years. -fn calc_now(period: u32, counter: u16) -> u64 { - ((period as u64) << 15) + ((counter as u32 ^ ((period & 1) << 15)) as u64) -} - -struct AlarmState { - timestamp: Cell, - callback: Cell>, -} - -impl AlarmState { - fn new() -> Self { - Self { - timestamp: Cell::new(u64::MAX), - callback: Cell::new(None), - } - } -} - -// TODO: This is sometimes wasteful, try to find a better way -const ALARM_COUNT: usize = 3; - -/// RTC timer that can be used by the executor and to set alarms. -/// -/// It can work with Timers 2 and 3. - -/// This timer works internally with a unit of 2^15 ticks, which means that if a call to -/// [`embassy::time::Clock::now`] is blocked for that amount of ticks the returned value will be -/// wrong (an old value). The current default tick rate is 32768 ticks per second. -pub struct RTC { - rtc: T, - irq: T::Interrupt, - - /// Number of 2^23 periods elapsed since boot. - period: AtomicU32, - - /// Timestamp at which to fire alarm. u64::MAX if no alarm is scheduled. - alarms: Mutex<[AlarmState; ALARM_COUNT]>, - - clocks: Clocks, -} - -impl RTC { - pub fn new(rtc: T, irq: T::Interrupt, clocks: Clocks) -> Self { - Self { - rtc, - irq, - period: AtomicU32::new(0), - alarms: Mutex::new([AlarmState::new(), AlarmState::new(), AlarmState::new()]), - clocks, - } - } - - pub fn start(&'static self) { - self.rtc.enable_clock(); - self.rtc.stop_and_reset(); - - let freq = T::pclk(&self.clocks); - let psc = freq / TICKS_PER_SECOND as u32 - 1; - let psc: u16 = psc.try_into().unwrap(); - - self.rtc.set_psc_arr(psc, u16::MAX); - // Mid-way point - self.rtc.set_compare(0, 0x8000); - self.rtc.set_compare_interrupt(0, true); - - self.irq.set_handler(|ptr| unsafe { - let this = &*(ptr as *const () as *const Self); - this.on_interrupt(); - }); - self.irq.set_handler_context(self as *const _ as *mut _); - self.irq.unpend(); - self.irq.enable(); - - self.rtc.start(); - } - - fn on_interrupt(&self) { - if self.rtc.overflow_interrupt_status() { - self.rtc.overflow_clear_flag(); - self.next_period(); - } - - // Half overflow - if self.rtc.compare_interrupt_status(0) { - self.rtc.compare_clear_flag(0); - self.next_period(); - } - - for n in 1..=ALARM_COUNT { - if self.rtc.compare_interrupt_status(n) { - self.rtc.compare_clear_flag(n); - critical_section::with(|cs| self.trigger_alarm(n, cs)); - } - } - } - - fn next_period(&self) { - critical_section::with(|cs| { - let period = self.period.fetch_add(1, Ordering::Relaxed) + 1; - let t = (period as u64) << 15; - - for n in 1..=ALARM_COUNT { - let alarm = &self.alarms.borrow(cs)[n - 1]; - let at = alarm.timestamp.get(); - - let diff = at - t; - if diff < 0xc000 { - self.rtc.set_compare(n, at as u16); - self.rtc.set_compare_interrupt(n, true); - } - } - }) - } - - fn trigger_alarm(&self, n: usize, cs: CriticalSection) { - self.rtc.set_compare_interrupt(n, false); - - let alarm = &self.alarms.borrow(cs)[n - 1]; - alarm.timestamp.set(u64::MAX); - - // Call after clearing alarm, so the callback can set another alarm. - if let Some((f, ctx)) = alarm.callback.get() { - f(ctx); - } - } - - fn set_alarm_callback(&self, n: usize, callback: fn(*mut ()), ctx: *mut ()) { - critical_section::with(|cs| { - let alarm = &self.alarms.borrow(cs)[n - 1]; - alarm.callback.set(Some((callback, ctx))); - }) - } - - fn set_alarm(&self, n: usize, timestamp: u64) { - critical_section::with(|cs| { - let alarm = &self.alarms.borrow(cs)[n - 1]; - alarm.timestamp.set(timestamp); - - let t = self.now(); - if timestamp <= t { - self.trigger_alarm(n, cs); - return; - } - - let diff = timestamp - t; - if diff < 0xc000 { - let safe_timestamp = timestamp.max(t + 3); - self.rtc.set_compare(n, safe_timestamp as u16); - self.rtc.set_compare_interrupt(n, true); - } else { - self.rtc.set_compare_interrupt(n, false); - } - }); - } - - pub fn alarm1(&'static self) -> Alarm { - Alarm { n: 1, rtc: self } - } - pub fn alarm2(&'static self) -> Option> { - if T::REAL_ALARM_COUNT >= 2 { - Some(Alarm { n: 2, rtc: self }) - } else { - None - } - } - pub fn alarm3(&'static self) -> Option> { - if T::REAL_ALARM_COUNT >= 3 { - Some(Alarm { n: 3, rtc: self }) - } else { - None - } - } -} - -impl embassy::time::Clock for RTC { - fn now(&self) -> u64 { - let period = self.period.load(Ordering::Relaxed); - compiler_fence(Ordering::Acquire); - let counter = self.rtc.counter(); - calc_now(period, counter) - } -} - -pub struct Alarm { - n: usize, - rtc: &'static RTC, -} - -impl embassy::time::Alarm for Alarm { - fn set_callback(&self, callback: fn(*mut ()), ctx: *mut ()) { - self.rtc.set_alarm_callback(self.n, callback, ctx); - } - - fn set(&self, timestamp: u64) { - self.rtc.set_alarm(self.n, timestamp); - } - - fn clear(&self) { - self.rtc.set_alarm(self.n, u64::MAX); - } -} - -mod sealed { - pub trait Sealed {} -} - -pub trait Instance: sealed::Sealed + Sized + 'static { - type Interrupt: Interrupt; - const REAL_ALARM_COUNT: usize; - - fn enable_clock(&self); - fn set_compare(&self, n: usize, value: u16); - fn set_compare_interrupt(&self, n: usize, enable: bool); - fn compare_interrupt_status(&self, n: usize) -> bool; - fn compare_clear_flag(&self, n: usize); - fn overflow_interrupt_status(&self) -> bool; - fn overflow_clear_flag(&self); - // This method should ensure that the values are really updated before returning - fn set_psc_arr(&self, psc: u16, arr: u16); - fn stop_and_reset(&self); - fn start(&self); - fn counter(&self) -> u16; - fn pclk(clocks: &Clocks) -> u32; -} - -#[allow(unused_macros)] -macro_rules! impl_timer { - ($module:ident: ($TYPE:ident, $INT:ident, $timXen:ident, $timXrst:ident, $apbenr:ident, $apbrstr:ident, $pclk: ident)) => { - mod $module { - use super::*; - use crate::hal::pac::{$TYPE, RCC}; - - impl sealed::Sealed for $TYPE {} - - impl Instance for $TYPE { - type Interrupt = interrupt::$INT; - const REAL_ALARM_COUNT: usize = 3; - - fn enable_clock(&self) { - // NOTE(unsafe) It will only be used for atomic operations - unsafe { - let rcc = &*RCC::ptr(); - - rcc.$apbenr.modify(|_, w| w.$timXen().set_bit()); - rcc.$apbrstr.modify(|_, w| w.$timXrst().set_bit()); - rcc.$apbrstr.modify(|_, w| w.$timXrst().clear_bit()); - } - } - - fn set_compare(&self, n: usize, value: u16) { - // NOTE(unsafe) these registers accept all the range of u16 values - match n { - 0 => self.ccr1.write(|w| unsafe { w.bits(value.into()) }), - 1 => self.ccr2.write(|w| unsafe { w.bits(value.into()) }), - 2 => self.ccr3.write(|w| unsafe { w.bits(value.into()) }), - 3 => self.ccr4.write(|w| unsafe { w.bits(value.into()) }), - _ => {} - } - } - - fn set_compare_interrupt(&self, n: usize, enable: bool) { - if n > 3 { - return; - } - let bit = n as u8 + 1; - unsafe { - if enable { - self.dier.modify(|r, w| w.bits(r.bits() | (1 << bit))); - } else { - self.dier.modify(|r, w| w.bits(r.bits() & !(1 << bit))); - } - } - } - - fn compare_interrupt_status(&self, n: usize) -> bool { - let status = self.sr.read(); - match n { - 0 => status.cc1if().bit_is_set(), - 1 => status.cc2if().bit_is_set(), - 2 => status.cc3if().bit_is_set(), - 3 => status.cc4if().bit_is_set(), - _ => false, - } - } - - fn compare_clear_flag(&self, n: usize) { - if n > 3 { - return; - } - let bit = n as u8 + 1; - unsafe { - self.sr.modify(|r, w| w.bits(r.bits() & !(1 << bit))); - } - } - - fn overflow_interrupt_status(&self) -> bool { - self.sr.read().uif().bit_is_set() - } - - fn overflow_clear_flag(&self) { - unsafe { - self.sr.modify(|_, w| w.uif().clear_bit()); - } - } - - fn set_psc_arr(&self, psc: u16, arr: u16) { - // NOTE(unsafe) All u16 values are valid - self.psc.write(|w| unsafe { w.bits(psc.into()) }); - self.arr.write(|w| unsafe { w.bits(arr.into()) }); - - unsafe { - // Set URS, generate update, clear URS - self.cr1.modify(|_, w| w.urs().set_bit()); - self.egr.write(|w| w.ug().set_bit()); - self.cr1.modify(|_, w| w.urs().clear_bit()); - } - } - - fn stop_and_reset(&self) { - unsafe { - self.cr1.modify(|_, w| w.cen().clear_bit()); - } - self.cnt.reset(); - } - - fn start(&self) { - self.cr1.modify(|_, w| w.cen().set_bit()); - } - - fn counter(&self) -> u16 { - self.cnt.read().bits() as u16 - } - - fn pclk(clocks: &Clocks) -> u32 { - clocks.$pclk().0 - } - } - } - }; -} - -impl_timer!(tim2: (TIM2, TIM2, tim2en, tim2rst, apb1enr, apb1rstr, apb1_tim_clk)); -impl_timer!(tim3: (TIM3, TIM3, tim3en, tim3rst, apb1enr, apb1rstr, apb1_tim_clk)); diff --git a/embassy-stm32/src/l0/system.rs b/embassy-stm32/src/l0/system.rs deleted file mode 100644 index 00e417d4..00000000 --- a/embassy-stm32/src/l0/system.rs +++ /dev/null @@ -1,17 +0,0 @@ -use crate::{hal, pac, Peripherals}; - -pub use hal::{ - prelude::*, - rcc::{Clocks, Config}, -}; - -/// safety: must only call once. -pub unsafe fn configure(config: Config) { - let dp = pac::Peripherals::take().unwrap(); - - let rcc = dp.RCC.freeze(config); - - let clocks = rcc.clocks; - - unsafe { Peripherals::set_peripherals(clocks) }; -} diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs deleted file mode 100644 index 2fd9f1d3..00000000 --- a/embassy-stm32/src/lib.rs +++ /dev/null @@ -1,478 +0,0 @@ -#![no_std] -#![feature(generic_associated_types)] -#![feature(asm)] -#![feature(min_type_alias_impl_trait)] -#![feature(impl_trait_in_bindings)] -#![feature(type_alias_impl_trait)] -#![allow(incomplete_features)] - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -mod f4; - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -pub use {stm32f4xx_hal as hal, stm32f4xx_hal::stm32 as pac}; - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -pub use {stm32l0xx_hal as hal, stm32l0xx_hal::pac}; - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -mod l0; - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -pub use l0::{rtc, system}; - -pub mod fmt; - -pub mod exti; -pub mod interrupt; - -#[cfg(any( - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -pub mod can; - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -pub use f4::{rtc, serial, spi, system}; - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -unsafe impl embassy_extras::usb::USBInterrupt for interrupt::OTG_FS {} - -use core::option::Option; -use hal::prelude::*; -use hal::rcc::Clocks; - -#[cfg(feature = "stm32f401")] -embassy_extras::std_peripherals! { - ADC_COMMON, - ADC1, - CRC, - DBGMCU, - EXTI, - FLASH, - IWDG, - OTG_FS_DEVICE, - OTG_FS_GLOBAL, - OTG_FS_HOST, - OTG_FS_PWRCLK, - PWR, - //RCC, - RTC, - SDIO, - SYSCFG, - TIM1, - TIM8, - TIM10, - TIM11, - TIM2, - //TIM3, - TIM4, - TIM5, - TIM9, - USART1, - USART2, - USART6, - WWDG, - DMA2, - DMA1, - GPIOH, - GPIOE, - GPIOD, - GPIOC, - GPIOB, - GPIOA, - I2C3, - I2C2, - I2C1, - I2S2EXT, - I2S3EXT, - SPI1, - SPI2, - SPI3, - SPI4, - FPU, - STK, - NVIC_STIR, - FPU_CPACR, - SCB_ACTRL, -} - -#[cfg(feature = "stm32f446")] -embassy_extras::std_peripherals! { - DCMI, - FMC, - DBGMCU, - DMA2, - DMA1, -// RCC, - GPIOH, - GPIOG, - GPIOF, - GPIOE, - GPIOD, - GPIOC, - GPIOB, - GPIOA, - SYSCFG, - SPI1, - SPI2, - SPI3, - SPI4, - ADC1, - ADC2, - ADC3, - USART6, - USART1, - USART2, - USART3, - DAC, - I2C3, - I2C2, - I2C1, - IWDG, - WWDG, - RTC, - UART4, - UART5, - ADC_COMMON, - TIM1, - TIM2, - TIM8, -// TIM3, - TIM4, - TIM5, - TIM9, - TIM12, - TIM10, - TIM13, - TIM14, - TIM11, - TIM6, - TIM7, - CRC, - OTG_FS_GLOBAL, - OTG_FS_HOST, - OTG_FS_DEVICE, - OTG_FS_PWRCLK, - CAN1, - CAN2, - FLASH, - EXTI, - OTG_HS_GLOBAL, - OTG_HS_HOST, - OTG_HS_DEVICE, - OTG_HS_PWRCLK, - SAI1, - SAI2, - PWR, - QUADSPI, - SPDIFRX, -// SDMMC, - HDMI_CEC, - FPU, - STK, - NVIC_STIR, - FPU_CPACR, - SCB_ACTRL, -} - -#[cfg(feature = "stm32f405")] -embassy_extras::std_peripherals! { - RNG, - DCMI, - FSMC, - DBGMCU, - DMA2, - DMA1, -// RCC, - GPIOI, - GPIOH, - GPIOG, - GPIOF, - GPIOE, - GPIOD, - GPIOC, - GPIOJ, - GPIOK, - GPIOB, - GPIOA, - SYSCFG, - SPI1, - SPI2, - SPI3, - I2S2EXT, - I2S3EXT, - SPI4, - SPI5, - SPI6, - SDIO, - ADC1, - ADC2, - ADC3, - USART6, - USART1, - USART2, - USART3, - DAC, - PWR, - I2C3, - I2C2, - I2C1, - IWDG, - WWDG, - RTC, - UART4, - UART5, - UART7, - UART8, - ADC_COMMON, - TIM1, - TIM8, - TIM2, -// TIM3, - TIM4, - TIM5, - TIM9, - TIM12, - TIM10, - TIM13, - TIM14, - TIM11, - TIM6, - TIM7, - ETHERNET_MAC, - ETHERNET_MMC, - ETHERNET_PTP, - ETHERNET_DMA, - CRC, - OTG_FS_GLOBAL, - OTG_FS_HOST, - OTG_FS_DEVICE, - OTG_FS_PWRCLK, - CAN1, - CAN2, - FLASH, - EXTI, - OTG_HS_GLOBAL, - OTG_HS_HOST, - OTG_HS_DEVICE, - OTG_HS_PWRCLK, - SAI1, - LTDC, - HASH, - CRYP, - FPU, - STK, - NVIC_STIR, - FPU_CPACR, - SCB_ACTRL, -} - -#[cfg(feature = "stm32f407")] -embassy_extras::std_peripherals! { - RNG, - DCMI, - FSMC, - DBGMCU, - DMA2, - DMA1, -// RCC, - GPIOI, - GPIOH, - GPIOG, - GPIOF, - GPIOE, - GPIOD, - GPIOC, - GPIOJ, - GPIOK, - GPIOB, - GPIOA, - SYSCFG, - SPI1, - SPI2, - SPI3, - I2S2EXT, - I2S3EXT, - SPI4, - SPI5, - SPI6, - SDIO, - ADC1, - ADC2, - ADC3, - USART6, - USART1, - USART2, - USART3, - DAC, - PWR, - I2C3, - I2C2, - I2C1, - IWDG, - WWDG, - RTC, - UART4, - UART5, - UART7, - UART8, - ADC_COMMON, - TIM1, - TIM8, - TIM2, -// TIM3, - TIM4, - TIM5, - TIM9, - TIM12, - TIM10, - TIM13, - TIM14, - TIM11, - TIM6, - TIM7, - ETHERNET_MAC, - ETHERNET_MMC, - ETHERNET_PTP, - ETHERNET_DMA, - CRC, - OTG_FS_GLOBAL, - OTG_FS_HOST, - OTG_FS_DEVICE, - OTG_FS_PWRCLK, - CAN1, - CAN2, - FLASH, - EXTI, - OTG_HS_GLOBAL, - OTG_HS_HOST, - OTG_HS_DEVICE, - OTG_HS_PWRCLK, - SAI1, - LTDC, - HASH, - CRYP, - FPU, - STK, - NVIC_STIR, - FPU_CPACR, - SCB_ACTRL, -} - -#[cfg(feature = "stm32l0x2")] -embassy_extras::std_peripherals! { - SPI1, - SPI2, - USART1, - USART2, - USART4, - USART5, - I2C1, - I2C2, - I2C3, - RNG, - TIM2, - TIM3, - TIM6, - TIM7, - TIM21, - TIM22, - DAC, - RTC, - PWR, - CRC, - GPIOA, - GPIOB, - GPIOC, - GPIOD, - GPIOE, - GPIOH, - SYSCFG, - DMA1, - EXTI, - ADC, - IWDG, - WWDG, - DBG, -}