From c1bb83d29d7615e12cab6589a0e9629895fbb316 Mon Sep 17 00:00:00 2001 From: Thales Fragoso Date: Mon, 26 Jul 2021 20:13:23 -0300 Subject: [PATCH] i2c-v2: Deref interrupt enabling in write_dma_internal --- embassy-stm32/src/i2c/v2.rs | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index 805265d2..8a936955 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -407,7 +407,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { let regs = T::regs(); regs.cr1().modify(|w| { w.set_txdmaen(true); - w.set_tcie(true); + if first_slice { + w.set_tcie(true); + } }); let dst = regs.txdr().ptr() as *mut u8; @@ -442,9 +444,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { ); } } else { - // NOTE(unsafe) self.tx_dma does not fiddle with the i2c registers unsafe { Self::master_continue(total_len.min(255), (total_chunks != 1) || !last_slice); + T::regs().cr1().modify(|w| w.set_tcie(true)); } }