Update stm32-metapac.
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@ -58,7 +58,7 @@ rand_core = "0.6.3"
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sdio-host = "0.5.0"
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sdio-host = "0.5.0"
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embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
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embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
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critical-section = "1.1"
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critical-section = "1.1"
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7117ad49c06fa00c388130a34977e029910083bd" }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-019a5da1c47c092c199bc39a7f84fb444f2adcdf" }
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vcell = "0.1.3"
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vcell = "0.1.3"
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bxcan = "0.7.0"
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bxcan = "0.7.0"
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nb = "1.0.0"
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nb = "1.0.0"
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@ -76,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] }
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[build-dependencies]
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[build-dependencies]
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proc-macro2 = "1.0.36"
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proc-macro2 = "1.0.36"
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quote = "1.0.15"
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quote = "1.0.15"
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7117ad49c06fa00c388130a34977e029910083bd", default-features = false, features = ["metadata"]}
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-019a5da1c47c092c199bc39a7f84fb444f2adcdf", default-features = false, features = ["metadata"]}
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[features]
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[features]
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@ -930,6 +930,10 @@ fn main() {
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} else if pin.signal.starts_with("INN") {
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} else if pin.signal.starts_with("INN") {
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// TODO handle in the future when embassy supports differential measurements
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// TODO handle in the future when embassy supports differential measurements
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None
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None
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} else if pin.signal.starts_with("IN") && pin.signal.ends_with("b") {
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// we number STM32L1 ADC bank 1 as 0..=31, bank 2 as 32..=63
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let signal = pin.signal.strip_prefix("IN").unwrap().strip_suffix("b").unwrap();
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Some(32u8 + signal.parse::<u8>().unwrap())
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} else if pin.signal.starts_with("IN") {
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} else if pin.signal.starts_with("IN") {
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Some(pin.signal.strip_prefix("IN").unwrap().parse().unwrap())
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Some(pin.signal.strip_prefix("IN").unwrap().parse().unwrap())
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} else {
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} else {
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@ -148,7 +148,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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reg.set_cont(false);
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reg.set_cont(false);
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reg.set_exttrig(true);
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reg.set_exttrig(true);
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reg.set_swstart(false);
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reg.set_swstart(false);
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reg.set_extsel(crate::pac::adc::vals::Extsel::SWSTART);
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reg.set_extsel(7); // SWSTART
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});
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});
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// Configure the channel to sample
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// Configure the channel to sample
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@ -1,6 +1,6 @@
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#![macro_use]
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#![macro_use]
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#[cfg_attr(can_bxcan, path = "bxcan.rs")]
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#[cfg_attr(can_bxcan, path = "bxcan.rs")]
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#[cfg_attr(can_fdcan, path = "fdcan.rs")]
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#[cfg_attr(any(can_fdcan_v1, can_fdcan_h7), path = "fdcan.rs")]
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mod _version;
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mod _version;
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pub use _version::*;
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pub use _version::*;
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@ -315,6 +315,8 @@ pub(crate) unsafe fn init(config: Config) {
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adc: adc12_ck,
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adc: adc12_ck,
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adc34: adc345_ck,
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adc34: adc345_ck,
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pll1_p: None,
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pll1_p: None,
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pll1_q: None, // TODO
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hse: None, // TODO
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rtc,
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rtc,
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});
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});
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}
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}
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@ -119,7 +119,7 @@ pub struct Clocks {
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#[cfg(any(stm32g4, rcc_l4))]
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#[cfg(any(stm32g4, rcc_l4))]
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pub pll1_p: Option<Hertz>,
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pub pll1_p: Option<Hertz>,
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#[cfg(any(stm32h5, stm32h7, rcc_f2, rcc_f4, rcc_f410, rcc_f7, rcc_l4))]
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#[cfg(any(stm32h5, stm32h7, stm32f2, stm32f4, stm32f7, rcc_l4, stm32g4))]
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pub pll1_q: Option<Hertz>,
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pub pll1_q: Option<Hertz>,
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#[cfg(any(stm32h5, stm32h7))]
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#[cfg(any(stm32h5, stm32h7))]
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pub pll2_p: Option<Hertz>,
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pub pll2_p: Option<Hertz>,
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@ -167,7 +167,7 @@ pub struct Clocks {
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#[cfg(any(stm32h5, stm32h7, rcc_l4, rcc_c0))]
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#[cfg(any(stm32h5, stm32h7, rcc_l4, rcc_c0))]
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pub lse: Option<Hertz>,
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pub lse: Option<Hertz>,
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#[cfg(any(stm32h5, stm32h7))]
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#[cfg(any(stm32h5, stm32h7, stm32g4))]
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pub hse: Option<Hertz>,
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pub hse: Option<Hertz>,
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#[cfg(stm32h5)]
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#[cfg(stm32h5)]
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