Add utility to enable debug
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@ -6,8 +6,10 @@ use crate::time::U32Ext;
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use core::marker::PhantomData;
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use core::marker::PhantomData;
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use embassy::util::Unborrow;
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use embassy::util::Unborrow;
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use embassy_extras::unborrow;
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use embassy_extras::unborrow;
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use pac::rcc::vals;
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use pac::dbg::vals::{DbgSleep, DbgStandby, DbgStop};
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use vals::{Dbgen, Hpre, Lptimen, Msirange, Plldiv, Pllmul, Pllon, Pllsrc, Ppre, Sw};
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use pac::rcc::vals::{
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Crypen, Dbgen, Hpre, Iophen, Lptimen, Msirange, Plldiv, Pllmul, Pllon, Pllsrc, Ppre, Sw,
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};
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/// Most of clock setup is copied from stm32l0xx-hal, and adopted to the generated PAC,
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/// Most of clock setup is copied from stm32l0xx-hal, and adopted to the generated PAC,
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/// and with the addition of the init function to configure a system clock.
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/// and with the addition of the init function to configure a system clock.
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@ -258,9 +260,23 @@ impl<'d> Rcc<'d> {
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LSE(())
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LSE(())
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}
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}
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}
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}
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*/
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pub fn enable_debug_wfe(&mut self, _dbg: &mut peripherals::DBGMCU, enable_dma: bool) {
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// NOTE(unsafe) We have exclusive access to the RCC and DBGMCU
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unsafe {
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if enable_dma {
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pac::RCC.ahbenr().modify(|w| w.set_dmaen(Crypen::ENABLED));
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}
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pac::DBGMCU.cr().modify(|w| {
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w.set_dbg_sleep(DbgSleep::ENABLED);
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w.set_dbg_standby(DbgStandby::ENABLED);
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w.set_dbg_stop(DbgStop::ENABLED);
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});
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}
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}
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impl Rcc {
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*/
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pub fn enable_hsi48(&mut self, _syscfg: &mut SYSCFG, _crs: CRS) -> HSI48 {
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pub fn enable_hsi48(&mut self, _syscfg: &mut SYSCFG, _crs: CRS) -> HSI48 {
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let rcc = pac::RCC;
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let rcc = pac::RCC;
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unsafe {
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unsafe {
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@ -510,7 +526,7 @@ pub struct LSE(());
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pub unsafe fn init(config: Config) {
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pub unsafe fn init(config: Config) {
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let rcc = pac::RCC;
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let rcc = pac::RCC;
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let enabled = vals::Iophen::ENABLED;
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let enabled = Iophen::ENABLED;
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rcc.iopenr().write(|w| {
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rcc.iopenr().write(|w| {
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w.set_iopaen(enabled);
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w.set_iopaen(enabled);
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w.set_iopben(enabled);
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w.set_iopben(enabled);
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