Wire up DMA with USART v1.
This commit is contained in:
@ -1,6 +1,6 @@
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#![macro_use]
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//#[cfg_attr(dma_v1, path = "v1.rs")]
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#[cfg_attr(dma_v1, path = "v1.rs")]
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#[cfg_attr(dma_v2, path = "v2.rs")]
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mod _version;
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@ -19,4 +19,12 @@ pub trait WriteDma<T> {
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T: 'a;
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}
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pub trait ReadDma {}
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pub trait ReadDma<T> {
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type ReadDmaFuture<'a>: Future<Output = ()> + 'a
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where
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Self: 'a;
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fn transfer<'a>(&'a mut self, src: *const u8, buf: &'a mut [u8]) -> Self::ReadDmaFuture<'a>
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where
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T: 'a;
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}
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@ -39,6 +39,52 @@ impl State {
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static STATE: State = State::new();
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#[allow(unused)] // Used by usart/v1.rs which may or may not be enabled
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pub(crate) async unsafe fn transfer_p2m(
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ch: &mut impl Channel,
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ch_func: u8,
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src: *const u8,
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dst: &mut [u8],
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) {
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let n = ch.num();
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let c = ch.regs();
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// ndtr is max 16 bits.
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assert!(dst.len() <= 0xFFFF);
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// Reset status
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STATE.ch_status[n].store(CH_STATUS_NONE, Ordering::Relaxed);
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unsafe {
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c.par().write_value(src as _);
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c.m0ar().write_value(dst.as_ptr() as _);
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c.ndtr().write_value(regs::Ndtr(dst.len() as _));
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c.cr().write(|w| {
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w.set_dir(vals::Dir::PERIPHERALTOMEMORY);
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w.set_msize(vals::Size::BITS8);
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w.set_psize(vals::Size::BITS8);
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w.set_minc(vals::Inc::INCREMENTED);
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w.set_pinc(vals::Inc::FIXED);
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w.set_chsel(ch_func);
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w.set_teie(true);
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w.set_tcie(true);
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w.set_en(true);
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});
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}
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let res = poll_fn(|cx| {
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STATE.ch_wakers[n].register(cx.waker());
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match STATE.ch_status[n].load(Ordering::Relaxed) {
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CH_STATUS_NONE => Poll::Pending,
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x => Poll::Ready(x),
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}
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})
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.await;
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// TODO handle error
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assert!(res == CH_STATUS_COMPLETED);
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}
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#[allow(unused)] // Used by usart/v1.rs which may or may not be enabled
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pub(crate) async unsafe fn transfer_m2p(
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ch: &mut impl Channel,
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@ -75,7 +121,10 @@ pub(crate) async unsafe fn transfer_m2p(
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let res = poll_fn(|cx| {
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STATE.ch_wakers[n].register(cx.waker());
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match STATE.ch_status[n].load(Ordering::Relaxed) {
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CH_STATUS_NONE => Poll::Pending,
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CH_STATUS_NONE => {
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let left = c.ndtr().read().ndt();
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Poll::Pending
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}
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x => Poll::Ready(x),
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}
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})
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@ -137,14 +186,14 @@ pub(crate) mod sealed {
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}
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}
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pub trait PeripheralChannel<PERI>: Channel {
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pub trait PeripheralChannel<PERI, OP>: Channel {
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fn request(&self) -> u8;
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}
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}
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pub trait Dma: sealed::Dma + Sized {}
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pub trait Channel: sealed::Channel + Sized {}
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pub trait PeripheralChannel<PERI>: sealed::PeripheralChannel<PERI> + Sized {}
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pub trait PeripheralChannel<PERI, OP>: sealed::PeripheralChannel<PERI, OP> + Sized {}
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macro_rules! impl_dma {
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($peri:ident, $num:expr) => {
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@ -180,7 +229,7 @@ macro_rules! impl_dma_channel {
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impl<T> WriteDma<T> for peripherals::$channel_peri
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where
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Self: sealed::PeripheralChannel<T>,
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Self: sealed::PeripheralChannel<T, M2P>,
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T: 'static,
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{
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type WriteDmaFuture<'a> = impl Future<Output = ()>;
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@ -189,10 +238,30 @@ macro_rules! impl_dma_channel {
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where
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T: 'a,
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{
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let request = sealed::PeripheralChannel::<T>::request(self);
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let request = sealed::PeripheralChannel::<T, M2P>::request(self);
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unsafe { transfer_m2p(self, request, buf, dst) }
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}
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}
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impl<T> ReadDma<T> for peripherals::$channel_peri
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where
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Self: sealed::PeripheralChannel<T, P2M>,
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T: 'static,
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{
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type ReadDmaFuture<'a> = impl Future<Output = ()>;
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fn transfer<'a>(
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&'a mut self,
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src: *const u8,
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buf: &'a mut [u8],
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) -> Self::ReadDmaFuture<'a>
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where
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T: 'a,
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{
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let request = sealed::PeripheralChannel::<T, P2M>::request(self);
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unsafe { transfer_p2m(self, request, src, buf) }
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}
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}
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};
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}
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@ -217,12 +286,16 @@ peripherals! {
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interrupts! {
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(DMA, $irq:ident) => {
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#[crate::interrupt]
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unsafe fn $irq () {
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on_irq()
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}
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};
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}
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pub struct P2M;
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pub struct M2P;
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#[cfg(usart)]
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use crate::usart;
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peripheral_dma_channels! {
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@ -230,25 +303,25 @@ peripheral_dma_channels! {
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impl usart::RxDma<peripherals::$peri> for peripherals::$channel_peri { }
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impl usart::sealed::RxDma<peripherals::$peri> for peripherals::$channel_peri { }
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impl sealed::PeripheralChannel<peripherals::$peri> for peripherals::$channel_peri {
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impl sealed::PeripheralChannel<peripherals::$peri, P2M> for peripherals::$channel_peri {
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fn request(&self) -> u8 {
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$event_num
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}
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}
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impl PeripheralChannel<peripherals::$peri> for peripherals::$channel_peri { }
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impl PeripheralChannel<peripherals::$peri, P2M> for peripherals::$channel_peri { }
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};
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($peri:ident, usart, $kind:ident, TX, $channel_peri:ident, $dma_peri:ident, $channel_num:expr, $event_num:expr) => {
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impl usart::TxDma<peripherals::$peri> for peripherals::$channel_peri { }
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impl usart::sealed::TxDma<peripherals::$peri> for peripherals::$channel_peri { }
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impl sealed::PeripheralChannel<peripherals::$peri> for peripherals::$channel_peri {
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impl sealed::PeripheralChannel<peripherals::$peri, M2P> for peripherals::$channel_peri {
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fn request(&self) -> u8 {
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$event_num
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}
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}
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impl PeripheralChannel<peripherals::$peri> for peripherals::$channel_peri { }
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impl PeripheralChannel<peripherals::$peri, M2P> for peripherals::$channel_peri { }
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};
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}
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