dont wait seqend for sequencepwm
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2973ff4cf0
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c6736abf5e
@ -166,10 +166,6 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
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r.loop_.write(|w| w.cnt().disabled());
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r.loop_.write(|w| w.cnt().disabled());
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
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r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
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// defensive wait until waveform is loaded after seqstart
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while r.events_seqend[0].read().bits() == 0 {}
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r.events_seqend[0].write(|w| w);
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}
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}
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// loop count is how many times to play BOTH sequences
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// loop count is how many times to play BOTH sequences
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// 2 total (1 x 2)
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// 2 total (1 x 2)
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@ -184,17 +180,9 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
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if odd {
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if odd {
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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r.tasks_seqstart[1].write(|w| unsafe { w.bits(0x01) });
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r.tasks_seqstart[1].write(|w| unsafe { w.bits(0x01) });
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// defensive wait until waveform is loaded after seqstart
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while r.events_seqend[1].read().bits() == 0 {}
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r.events_seqend[1].write(|w| w);
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} else {
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} else {
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
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r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
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// defensive wait until waveform is loaded after seqstart
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while r.events_seqend[0].read().bits() == 0 {}
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r.events_seqend[0].write(|w| w);
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}
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}
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}
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}
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// to play infinitely, repeat the sequence one time, then have loops done self trigger seq0 again
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// to play infinitely, repeat the sequence one time, then have loops done self trigger seq0 again
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@ -204,10 +192,6 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
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r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
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// defensive wait until waveform is loaded after seqstart
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while r.events_seqend[0].read().bits() == 0 {}
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r.events_seqend[0].write(|w| w);
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}
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}
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}
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}
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