Support for STM32L1
* Add RCC * Fix more issues with dash in chip names * Update stm32-data version * Add blinky and spi example
This commit is contained in:
Ulf Lilleengen
@ -625,6 +625,93 @@ stm32l083rz = [ "stm32-metapac/stm32l083rz" ]
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stm32l083v8 = [ "stm32-metapac/stm32l083v8" ]
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stm32l083vb = [ "stm32-metapac/stm32l083vb" ]
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stm32l083vz = [ "stm32-metapac/stm32l083vz" ]
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stm32l100c6-a = [ "stm32-metapac/stm32l100c6-a" ]
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stm32l100c6 = [ "stm32-metapac/stm32l100c6" ]
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stm32l100r8-a = [ "stm32-metapac/stm32l100r8-a" ]
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stm32l100r8 = [ "stm32-metapac/stm32l100r8" ]
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stm32l100rb-a = [ "stm32-metapac/stm32l100rb-a" ]
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stm32l100rb = [ "stm32-metapac/stm32l100rb" ]
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stm32l100rc = [ "stm32-metapac/stm32l100rc" ]
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stm32l151c6-a = [ "stm32-metapac/stm32l151c6-a" ]
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stm32l151c6 = [ "stm32-metapac/stm32l151c6" ]
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stm32l151c8-a = [ "stm32-metapac/stm32l151c8-a" ]
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stm32l151c8 = [ "stm32-metapac/stm32l151c8" ]
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stm32l151cb-a = [ "stm32-metapac/stm32l151cb-a" ]
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stm32l151cb = [ "stm32-metapac/stm32l151cb" ]
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stm32l151cc = [ "stm32-metapac/stm32l151cc" ]
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stm32l151qc = [ "stm32-metapac/stm32l151qc" ]
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stm32l151qd = [ "stm32-metapac/stm32l151qd" ]
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stm32l151qe = [ "stm32-metapac/stm32l151qe" ]
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stm32l151r6-a = [ "stm32-metapac/stm32l151r6-a" ]
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stm32l151r6 = [ "stm32-metapac/stm32l151r6" ]
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stm32l151r8-a = [ "stm32-metapac/stm32l151r8-a" ]
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stm32l151r8 = [ "stm32-metapac/stm32l151r8" ]
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stm32l151rb-a = [ "stm32-metapac/stm32l151rb-a" ]
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stm32l151rb = [ "stm32-metapac/stm32l151rb" ]
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stm32l151rc-a = [ "stm32-metapac/stm32l151rc-a" ]
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stm32l151rc = [ "stm32-metapac/stm32l151rc" ]
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stm32l151rd = [ "stm32-metapac/stm32l151rd" ]
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stm32l151re = [ "stm32-metapac/stm32l151re" ]
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stm32l151uc = [ "stm32-metapac/stm32l151uc" ]
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stm32l151v8-a = [ "stm32-metapac/stm32l151v8-a" ]
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stm32l151v8 = [ "stm32-metapac/stm32l151v8" ]
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stm32l151vb-a = [ "stm32-metapac/stm32l151vb-a" ]
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stm32l151vb = [ "stm32-metapac/stm32l151vb" ]
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stm32l151vc-a = [ "stm32-metapac/stm32l151vc-a" ]
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stm32l151vc = [ "stm32-metapac/stm32l151vc" ]
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stm32l151vd-x = [ "stm32-metapac/stm32l151vd-x" ]
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stm32l151vd = [ "stm32-metapac/stm32l151vd" ]
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stm32l151ve = [ "stm32-metapac/stm32l151ve" ]
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stm32l151zc = [ "stm32-metapac/stm32l151zc" ]
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stm32l151zd = [ "stm32-metapac/stm32l151zd" ]
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stm32l151ze = [ "stm32-metapac/stm32l151ze" ]
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stm32l152c6-a = [ "stm32-metapac/stm32l152c6-a" ]
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stm32l152c6 = [ "stm32-metapac/stm32l152c6" ]
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stm32l152c8-a = [ "stm32-metapac/stm32l152c8-a" ]
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stm32l152c8 = [ "stm32-metapac/stm32l152c8" ]
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stm32l152cb-a = [ "stm32-metapac/stm32l152cb-a" ]
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stm32l152cb = [ "stm32-metapac/stm32l152cb" ]
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stm32l152cc = [ "stm32-metapac/stm32l152cc" ]
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stm32l152qc = [ "stm32-metapac/stm32l152qc" ]
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stm32l152qd = [ "stm32-metapac/stm32l152qd" ]
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stm32l152qe = [ "stm32-metapac/stm32l152qe" ]
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stm32l152r6-a = [ "stm32-metapac/stm32l152r6-a" ]
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stm32l152r6 = [ "stm32-metapac/stm32l152r6" ]
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stm32l152r8-a = [ "stm32-metapac/stm32l152r8-a" ]
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stm32l152r8 = [ "stm32-metapac/stm32l152r8" ]
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stm32l152rb-a = [ "stm32-metapac/stm32l152rb-a" ]
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stm32l152rb = [ "stm32-metapac/stm32l152rb" ]
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stm32l152rc-a = [ "stm32-metapac/stm32l152rc-a" ]
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stm32l152rc = [ "stm32-metapac/stm32l152rc" ]
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stm32l152rd = [ "stm32-metapac/stm32l152rd" ]
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stm32l152re = [ "stm32-metapac/stm32l152re" ]
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stm32l152uc = [ "stm32-metapac/stm32l152uc" ]
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stm32l152v8-a = [ "stm32-metapac/stm32l152v8-a" ]
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stm32l152v8 = [ "stm32-metapac/stm32l152v8" ]
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stm32l152vb-a = [ "stm32-metapac/stm32l152vb-a" ]
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stm32l152vb = [ "stm32-metapac/stm32l152vb" ]
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stm32l152vc-a = [ "stm32-metapac/stm32l152vc-a" ]
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stm32l152vc = [ "stm32-metapac/stm32l152vc" ]
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stm32l152vd-x = [ "stm32-metapac/stm32l152vd-x" ]
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stm32l152vd = [ "stm32-metapac/stm32l152vd" ]
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stm32l152ve = [ "stm32-metapac/stm32l152ve" ]
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stm32l152zc = [ "stm32-metapac/stm32l152zc" ]
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stm32l152zd = [ "stm32-metapac/stm32l152zd" ]
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stm32l152ze = [ "stm32-metapac/stm32l152ze" ]
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stm32l162qc = [ "stm32-metapac/stm32l162qc" ]
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stm32l162qd = [ "stm32-metapac/stm32l162qd" ]
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stm32l162rc-a = [ "stm32-metapac/stm32l162rc-a" ]
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stm32l162rc = [ "stm32-metapac/stm32l162rc" ]
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stm32l162rd = [ "stm32-metapac/stm32l162rd" ]
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stm32l162re = [ "stm32-metapac/stm32l162re" ]
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stm32l162vc-a = [ "stm32-metapac/stm32l162vc-a" ]
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stm32l162vc = [ "stm32-metapac/stm32l162vc" ]
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stm32l162vd-x = [ "stm32-metapac/stm32l162vd-x" ]
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stm32l162vd = [ "stm32-metapac/stm32l162vd" ]
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stm32l162ve = [ "stm32-metapac/stm32l162ve" ]
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stm32l162zc = [ "stm32-metapac/stm32l162zc" ]
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stm32l162zd = [ "stm32-metapac/stm32l162zd" ]
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stm32l162ze = [ "stm32-metapac/stm32l162ze" ]
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stm32l412c8 = [ "stm32-metapac/stm32l412c8" ]
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stm32l412cb = [ "stm32-metapac/stm32l412cb" ]
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stm32l412k8 = [ "stm32-metapac/stm32l412k8" ]
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@ -85,13 +85,28 @@ fn main() {
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};
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);
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let mut chip_and_core = chip_name.split('_');
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let chip = chip_and_core.next().expect("Unexpected stm32xx feature");
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if let Some(core) = chip_and_core.next() {
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println!("cargo:rustc-cfg={}_{}", &chip[..(chip.len() - 2)], core);
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let mut s = chip_name.split('_');
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let mut chip_name: String = s.next().unwrap().to_string();
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let core_name = if let Some(c) = s.next() {
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if !c.starts_with("CM") {
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chip_name.push('_');
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chip_name.push_str(c);
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None
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} else {
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Some(c)
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}
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} else {
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println!("cargo:rustc-cfg={}", &chip[..(chip.len() - 2)]);
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None
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};
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if let Some(core) = core_name {
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println!(
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"cargo:rustc-cfg={}_{}",
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&chip_name[..chip_name.len() - 2],
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core
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);
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} else {
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println!("cargo:rustc-cfg={}", &chip_name[..chip_name.len() - 2]);
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}
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println!("cargo:rerun-if-changed=build.rs");
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235
embassy-stm32/src/rcc/l1/mod.rs
Normal file
235
embassy-stm32/src/rcc/l1/mod.rs
Normal file
@ -0,0 +1,235 @@
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pub use super::types::*;
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use crate::pac;
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use crate::peripherals::{self, RCC};
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use crate::rcc::{get_freqs, set_freqs, Clocks};
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use crate::time::Hertz;
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use crate::time::U32Ext;
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use core::marker::PhantomData;
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use embassy::util::Unborrow;
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use embassy_hal_common::unborrow;
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use pac::rcc::vals::{Hpre, Ppre, Sw};
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/// Most of clock setup is copied from rcc/l0
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/// HSI speed
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pub const HSI_FREQ: u32 = 16_000_000;
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/// System clock mux source
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#[derive(Clone, Copy)]
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pub enum ClockSrc {
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MSI(MSIRange),
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HSE(Hertz),
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HSI,
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}
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impl Into<Ppre> for APBPrescaler {
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fn into(self) -> Ppre {
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match self {
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APBPrescaler::NotDivided => Ppre::DIV1,
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APBPrescaler::Div2 => Ppre::DIV2,
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APBPrescaler::Div4 => Ppre::DIV4,
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APBPrescaler::Div8 => Ppre::DIV8,
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APBPrescaler::Div16 => Ppre::DIV16,
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}
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}
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}
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impl Into<Hpre> for AHBPrescaler {
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fn into(self) -> Hpre {
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match self {
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AHBPrescaler::NotDivided => Hpre::DIV1,
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AHBPrescaler::Div2 => Hpre::DIV2,
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AHBPrescaler::Div4 => Hpre::DIV4,
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AHBPrescaler::Div8 => Hpre::DIV8,
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AHBPrescaler::Div16 => Hpre::DIV16,
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AHBPrescaler::Div64 => Hpre::DIV64,
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AHBPrescaler::Div128 => Hpre::DIV128,
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AHBPrescaler::Div256 => Hpre::DIV256,
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AHBPrescaler::Div512 => Hpre::DIV512,
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}
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}
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}
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impl Into<u8> for MSIRange {
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fn into(self) -> u8 {
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match self {
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MSIRange::Range0 => 0b000,
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MSIRange::Range1 => 0b001,
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MSIRange::Range2 => 0b010,
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MSIRange::Range3 => 0b011,
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MSIRange::Range4 => 0b100,
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MSIRange::Range5 => 0b101,
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MSIRange::Range6 => 0b110,
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}
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}
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}
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/// Clocks configutation
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pub struct Config {
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mux: ClockSrc,
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ahb_pre: AHBPrescaler,
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apb1_pre: APBPrescaler,
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apb2_pre: APBPrescaler,
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}
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impl Default for Config {
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#[inline]
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fn default() -> Config {
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Config {
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mux: ClockSrc::MSI(MSIRange::default()),
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ahb_pre: AHBPrescaler::NotDivided,
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apb1_pre: APBPrescaler::NotDivided,
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apb2_pre: APBPrescaler::NotDivided,
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}
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}
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}
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impl Config {
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#[inline]
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pub fn clock_src(mut self, mux: ClockSrc) -> Self {
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self.mux = mux;
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self
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}
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#[inline]
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pub fn ahb_pre(mut self, pre: AHBPrescaler) -> Self {
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self.ahb_pre = pre;
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self
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}
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#[inline]
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pub fn apb1_pre(mut self, pre: APBPrescaler) -> Self {
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self.apb1_pre = pre;
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self
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}
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#[inline]
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pub fn apb2_pre(mut self, pre: APBPrescaler) -> Self {
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self.apb2_pre = pre;
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self
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}
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}
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/// RCC peripheral
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pub struct Rcc<'d> {
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_rb: peripherals::RCC,
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phantom: PhantomData<&'d mut peripherals::RCC>,
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}
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impl<'d> Rcc<'d> {
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pub fn new(rcc: impl Unborrow<Target = peripherals::RCC> + 'd) -> Self {
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unborrow!(rcc);
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Self {
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_rb: rcc,
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phantom: PhantomData,
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}
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}
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// Safety: RCC init must have been called
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pub fn clocks(&self) -> &'static Clocks {
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unsafe { get_freqs() }
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}
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}
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/// Extension trait that freezes the `RCC` peripheral with provided clocks configuration
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pub trait RccExt {
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fn freeze(self, config: Config) -> Clocks;
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}
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impl RccExt for RCC {
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// `cfgr` is almost always a constant, so make sure it can be constant-propagated properly by
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// marking this function and all `Config` constructors and setters as `#[inline]`.
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// This saves ~900 Bytes for the `pwr.rs` example.
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#[inline]
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fn freeze(self, cfgr: Config) -> Clocks {
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let rcc = pac::RCC;
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let (sys_clk, sw) = match cfgr.mux {
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ClockSrc::MSI(range) => {
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// Set MSI range
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unsafe {
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rcc.icscr().write(|w| w.set_msirange(range.into()));
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}
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// Enable MSI
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unsafe {
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rcc.cr().write(|w| w.set_msion(true));
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while !rcc.cr().read().msirdy() {}
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}
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let freq = 32_768 * (1 << (range as u8 + 1));
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(freq, Sw::MSI)
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}
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ClockSrc::HSI => {
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// Enable HSI
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unsafe {
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rcc.cr().write(|w| w.set_hsion(true));
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while !rcc.cr().read().hsirdy() {}
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}
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(HSI_FREQ, Sw::HSI)
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}
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ClockSrc::HSE(freq) => {
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// Enable HSE
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unsafe {
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rcc.cr().write(|w| w.set_hseon(true));
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while !rcc.cr().read().hserdy() {}
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}
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(freq.0, Sw::HSE)
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}
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};
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unsafe {
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rcc.cfgr().modify(|w| {
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w.set_sw(sw.into());
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w.set_hpre(cfgr.ahb_pre.into());
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w.set_ppre1(cfgr.apb1_pre.into());
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w.set_ppre2(cfgr.apb2_pre.into());
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});
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}
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let ahb_freq: u32 = match cfgr.ahb_pre {
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AHBPrescaler::NotDivided => sys_clk,
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pre => {
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let pre: Hpre = pre.into();
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let pre = 1 << (pre.0 as u32 - 7);
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sys_clk / pre
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}
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};
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let (apb1_freq, apb1_tim_freq) = match cfgr.apb1_pre {
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APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
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pre => {
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let pre: Ppre = pre.into();
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let pre: u8 = 1 << (pre.0 - 3);
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let freq = ahb_freq / pre as u32;
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(freq, freq * 2)
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}
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};
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let (apb2_freq, apb2_tim_freq) = match cfgr.apb2_pre {
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APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
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pre => {
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let pre: Ppre = pre.into();
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let pre: u8 = 1 << (pre.0 - 3);
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let freq = ahb_freq / (1 << (pre as u8 - 3));
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(freq, freq * 2)
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}
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};
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Clocks {
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sys: sys_clk.hz(),
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ahb: ahb_freq.hz(),
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apb1: apb1_freq.hz(),
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apb2: apb2_freq.hz(),
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apb1_tim: apb1_tim_freq.hz(),
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apb2_tim: apb2_tim_freq.hz(),
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}
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}
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}
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pub unsafe fn init(config: Config) {
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let r = <peripherals::RCC as embassy::util::Steal>::steal();
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let clocks = r.freeze(config);
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set_freqs(clocks);
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}
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@ -27,7 +27,7 @@ pub struct Clocks {
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#[cfg(rcc_wl5)]
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pub apb3: Hertz,
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#[cfg(any(rcc_l0, rcc_f0, rcc_f0x0, rcc_g0))]
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#[cfg(any(rcc_l0, rcc_l1, rcc_f0, rcc_f0x0, rcc_g0))]
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pub ahb: Hertz,
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||||
|
||||
#[cfg(any(rcc_l4, rcc_f4, rcc_h7, rcc_wb, rcc_wl5))]
|
||||
@ -73,6 +73,9 @@ cfg_if::cfg_if! {
|
||||
} else if #[cfg(rcc_l0)] {
|
||||
mod l0;
|
||||
pub use l0::*;
|
||||
} else if #[cfg(rcc_l1)] {
|
||||
mod l1;
|
||||
pub use l1::*;
|
||||
} else if #[cfg(rcc_l4)] {
|
||||
mod l4;
|
||||
pub use l4::*;
|
||||
|
||||
Reference in New Issue
Block a user