Merge pull request #277 from Liamolucko/fix-peripheral-ub
extras: Fix UB in `Peripheral`
This commit is contained in:
@ -175,8 +175,8 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
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pub fn set_baudrate(self: Pin<&mut Self>, baudrate: Baudrate) {
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let mut inner = self.inner();
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inner.as_mut().register_interrupt();
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inner.with(|state, _irq| {
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unsafe { inner.as_mut().register_interrupt_unchecked() }
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inner.with(|state| {
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let r = U::regs();
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let timeout = 0x8000_0000 / (baudrate as u32 / 40);
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@ -195,8 +195,8 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
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impl<'d, U: UarteInstance, T: TimerInstance> AsyncBufRead for BufferedUarte<'d, U, T> {
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fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
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let mut inner = self.inner();
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inner.as_mut().register_interrupt();
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inner.with(|state, _irq| {
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unsafe { inner.as_mut().register_interrupt_unchecked() }
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inner.with(|state| {
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// Conservative compiler fence to prevent optimizations that do not
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// take in to account actions by DMA. The fence has been placed here,
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// before any DMA action has started
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@ -220,20 +220,20 @@ impl<'d, U: UarteInstance, T: TimerInstance> AsyncBufRead for BufferedUarte<'d,
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fn consume(self: Pin<&mut Self>, amt: usize) {
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let mut inner = self.inner();
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inner.as_mut().register_interrupt();
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inner.with(|state, irq| {
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unsafe { inner.as_mut().register_interrupt_unchecked() }
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inner.as_mut().with(|state| {
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trace!("consume {:?}", amt);
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state.rx.pop(amt);
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irq.pend();
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})
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});
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inner.pend();
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}
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}
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impl<'d, U: UarteInstance, T: TimerInstance> AsyncWrite for BufferedUarte<'d, U, T> {
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fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> {
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let mut inner = self.inner();
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inner.as_mut().register_interrupt();
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inner.with(|state, irq| {
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unsafe { inner.as_mut().register_interrupt_unchecked() }
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let poll = inner.as_mut().with(|state| {
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trace!("poll_write: {:?}", buf.len());
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let tx_buf = state.tx.push_buf();
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@ -254,10 +254,12 @@ impl<'d, U: UarteInstance, T: TimerInstance> AsyncWrite for BufferedUarte<'d, U,
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// before any DMA action has started
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compiler_fence(Ordering::SeqCst);
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irq.pend();
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Poll::Ready(Ok(n))
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})
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});
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inner.pend();
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poll
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}
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}
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@ -29,7 +29,7 @@ pub(crate) mod sealed {
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pub trait ExtendedInstance {}
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}
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pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static {
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pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static + Send {
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type Interrupt: Interrupt;
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}
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pub trait ExtendedInstance: Instance + sealed::ExtendedInstance {}
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@ -461,7 +461,7 @@ pub(crate) mod sealed {
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}
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}
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pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static {
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pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static + Send {
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type Interrupt: Interrupt;
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}
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