stm32/bd: fix errors
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531f51d0eb
commit
cbc92dce05
@ -12,10 +12,12 @@ pub enum RtcClockSource {
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HSE = 0b11,
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HSE = 0b11,
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}
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}
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#[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
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#[cfg(not(any(rtc_v2l0, rtc_v2l1, stm32c0)))]
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#[allow(dead_code)]
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type Bdcr = crate::pac::rcc::regs::Bdcr;
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type Bdcr = crate::pac::rcc::regs::Bdcr;
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#[cfg(any(rtc_v2l0, rtc_v2l1))]
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#[cfg(any(rtc_v2l0, rtc_v2l1))]
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#[allow(dead_code)]
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type Bdcr = crate::pac::rcc::regs::Csr;
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type Bdcr = crate::pac::rcc::regs::Csr;
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#[allow(dead_code)]
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#[allow(dead_code)]
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@ -26,7 +28,7 @@ impl BackupDomain {
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rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
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rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
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rtc_v3u5
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rtc_v3u5
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))]
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))]
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#[allow(dead_code)]
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#[allow(dead_code, unused_variables)]
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fn modify<R>(f: impl FnOnce(&mut Bdcr) -> R) -> R {
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fn modify<R>(f: impl FnOnce(&mut Bdcr) -> R) -> R {
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#[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))]
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#[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))]
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let cr = crate::pac::PWR.cr();
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let cr = crate::pac::PWR.cr();
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@ -40,7 +42,13 @@ impl BackupDomain {
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while !cr.read().dbp() {}
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while !cr.read().dbp() {}
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}
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}
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crate::pac::RCC.bdcr().modify(|w| f(w))
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#[cfg(any(rtc_v2l0, rtc_v2l1))]
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let cr = crate::pac::RCC.csr();
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#[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
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let cr = crate::pac::RCC.bdcr();
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cr.modify(|w| f(w))
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}
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}
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#[cfg(any(
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#[cfg(any(
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@ -62,7 +70,7 @@ impl BackupDomain {
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rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
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rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
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rtc_v3u5
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rtc_v3u5
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))]
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))]
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#[allow(dead_code)]
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#[allow(dead_code, unused_variables)]
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pub fn set_rtc_clock_source(clock_source: RtcClockSource) {
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pub fn set_rtc_clock_source(clock_source: RtcClockSource) {
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let clock_source = clock_source as u8;
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let clock_source = clock_source as u8;
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#[cfg(any(
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#[cfg(any(
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