stm32/pwm: improve dead-time api
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7646f18836
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cd88e39f5f
@ -1,7 +1,7 @@
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use core::marker::PhantomData;
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use core::marker::PhantomData;
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use embassy_hal_common::{into_ref, PeripheralRef};
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use embassy_hal_common::{into_ref, PeripheralRef};
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pub use stm32_metapac::timer::vals::Ckd;
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use stm32_metapac::timer::vals::Ckd;
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use super::simple_pwm::*;
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use super::simple_pwm::*;
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use super::*;
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use super::*;
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@ -114,11 +114,145 @@ impl<'d, T: ComplementaryCaptureCompare16bitInstance> ComplementaryPwm<'d, T> {
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unsafe { self.inner.set_compare_value(channel, duty) }
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unsafe { self.inner.set_compare_value(channel, duty) }
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}
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}
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pub fn set_dead_time_clock_division(&mut self, value: Ckd) {
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/// Set the dead time as a proportion of max_duty
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unsafe { self.inner.set_dead_time_clock_division(value) }
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pub fn set_dead_time(&mut self, value: u16) {
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}
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let (ckd, value) = compute_dead_time_value(value);
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pub fn set_dead_time_value(&mut self, value: u8) {
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unsafe {
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unsafe { self.inner.set_dead_time_value(value) }
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self.inner.set_dead_time_clock_division(ckd);
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self.inner.set_dead_time_value(value);
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}
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}
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}
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fn compute_dead_time_value(value: u16) -> (Ckd, u8) {
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/*
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Dead-time = T_clk * T_dts * T_dtg
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T_dts:
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This bit-field indicates the division ratio between the timer clock (CK_INT) frequency and the
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dead-time and sampling clock (tDTS)used by the dead-time generators and the digital filters
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(ETR, TIx),
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00: tDTS=tCK_INT
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01: tDTS=2*tCK_INT
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10: tDTS=4*tCK_INT
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T_dtg:
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This bit-field defines the duration of the dead-time inserted between the complementary
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outputs. DT correspond to this duration.
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DTG[7:5]=0xx => DT=DTG[7:0]x tdtg with tdtg=tDTS.
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DTG[7:5]=10x => DT=(64+DTG[5:0])xtdtg with Tdtg=2xtDTS.
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DTG[7:5]=110 => DT=(32+DTG[4:0])xtdtg with Tdtg=8xtDTS.
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DTG[7:5]=111 => DT=(32+DTG[4:0])xtdtg with Tdtg=16xtDTS.
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Example if TDTS=125ns (8MHz), dead-time possible values are:
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0 to 15875 ns by 125 ns steps,
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16 us to 31750 ns by 250 ns steps,
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32 us to 63us by 1 us steps,
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64 us to 126 us by 2 us steps
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*/
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let mut error = u16::MAX;
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let mut ckd = Ckd::DIV1;
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let mut bits = 0u8;
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for this_ckd in [Ckd::DIV1, Ckd::DIV2, Ckd::DIV4] {
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let outdiv = match this_ckd {
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Ckd::DIV1 => 1,
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Ckd::DIV2 => 2,
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Ckd::DIV4 => 4,
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_ => unreachable!(),
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};
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// 127
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// 128
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// ..
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// 254
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// 256
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// ..
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// 504
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// 512
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// ..
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// 1008
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let target = value / outdiv;
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let (these_bits, result) = if target < 128 {
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(target as u8, target)
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} else if target < 255 {
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(64 + (target / 2) as u8, (target - target % 2))
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} else if target < 508 {
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(32 + (target / 8) as u8, (target - target % 8))
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} else if target < 1008 {
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(32 + (target / 16) as u8, (target - target % 16))
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} else {
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(u8::MAX, 1008)
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};
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let this_error = value.abs_diff(result * outdiv);
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if error > this_error {
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ckd = this_ckd;
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bits = these_bits;
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error = this_error;
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}
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match error {
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0 => break,
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_ => {}
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}
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}
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(ckd, bits)
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}
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#[cfg(test)]
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mod tests {
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use super::{compute_dead_time_value, Ckd};
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#[test]
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fn test_compute_dead_time_value() {
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struct test_run {
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value: u16,
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ckd: Ckd,
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bits: u8,
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}
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let fn_results = [
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test_run {
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value: 1,
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ckd: Ckd::DIV1,
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bits: 1,
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},
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test_run {
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value: 125,
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ckd: Ckd::DIV1,
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bits: 125,
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},
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test_run {
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value: 245,
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ckd: Ckd::DIV1,
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bits: 64 + 245 / 2,
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},
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test_run {
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value: 255,
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ckd: Ckd::DIV2,
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bits: 127,
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},
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test_run {
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value: 400,
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ckd: Ckd::DIV1,
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bits: 32 + (400u16 / 8) as u8,
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},
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test_run {
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value: 600,
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ckd: Ckd::DIV4,
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bits: 64 + (600u16 / 8) as u8,
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},
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];
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for test_run in fn_results {
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let (ckd, bits) = compute_dead_time_value(test_run.value);
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assert_eq!(ckd.0, test_run.ckd.0);
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assert_eq!(bits, test_run.bits);
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}
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}
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}
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}
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}
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@ -4,7 +4,7 @@
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use defmt::*;
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use defmt::*;
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use embassy_executor::Spawner;
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use embassy_executor::Spawner;
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use embassy_stm32::pwm::complementary_pwm::{Ckd, ComplementaryPwm, ComplementaryPwmPin};
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use embassy_stm32::pwm::complementary_pwm::{ComplementaryPwm, ComplementaryPwmPin};
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use embassy_stm32::pwm::simple_pwm::PwmPin;
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use embassy_stm32::pwm::simple_pwm::PwmPin;
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use embassy_stm32::pwm::Channel;
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use embassy_stm32::pwm::Channel;
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use embassy_stm32::time::khz;
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use embassy_stm32::time::khz;
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@ -31,34 +31,9 @@ async fn main(_spawner: Spawner) {
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khz(10),
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khz(10),
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);
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);
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/*
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Dead-time = T_clk * T_dts * T_dtg
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T_dts:
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This bit-field indicates the division ratio between the timer clock (CK_INT) frequency and the
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dead-time and sampling clock (tDTS)used by the dead-time generators and the digital filters
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(ETR, TIx),
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00: tDTS=tCK_INT
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01: tDTS=2*tCK_INT
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10: tDTS=4*tCK_INT
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T_dtg:
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This bit-field defines the duration of the dead-time inserted between the complementary
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outputs. DT correspond to this duration.
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DTG[7:5]=0xx => DT=DTG[7:0]x tdtg with tdtg=tDTS.
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DTG[7:5]=10x => DT=(64+DTG[5:0])xtdtg with Tdtg=2xtDTS.
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DTG[7:5]=110 => DT=(32+DTG[4:0])xtdtg with Tdtg=8xtDTS.
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DTG[7:5]=111 => DT=(32+DTG[4:0])xtdtg with Tdtg=16xtDTS.
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Example if TDTS=125ns (8MHz), dead-time possible values are:
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0 to 15875 ns by 125 ns steps,
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16 us to 31750 ns by 250 ns steps,
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32 us to 63us by 1 us steps,
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64 us to 126 us by 2 us steps
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*/
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pwm.set_dead_time_clock_division(Ckd::DIV1);
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pwm.set_dead_time_value(0);
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let max = pwm.get_max_duty();
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let max = pwm.get_max_duty();
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pwm.set_dead_time(max / 1024);
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pwm.enable(Channel::Ch1);
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pwm.enable(Channel::Ch1);
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info!("PWM initialized");
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info!("PWM initialized");
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