stm32/rcc: add lsi and lse bd abstraction

This commit is contained in:
xoviat 2023-09-06 17:33:56 -05:00
parent a05afc5426
commit d097c99719

View File

@ -1,6 +1,34 @@
#[allow(dead_code)]
#[derive(Default)]
pub enum LseDrive {
#[cfg(any(rtc_v2f7, rtc_v2l4))]
Low = 0,
MediumLow = 0x01,
#[default]
MediumHigh = 0x02,
#[cfg(any(rtc_v2f7, rtc_v2l4))]
High = 0x03,
}
#[cfg(any(rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l4))]
impl From<LseDrive> for crate::pac::rcc::vals::Lsedrv {
fn from(value: LseDrive) -> Self {
use crate::pac::rcc::vals::Lsedrv;
match value {
#[cfg(any(rtc_v2f7, rtc_v2l4))]
LseDrive::Low => Lsedrv::LOW,
LseDrive::MediumLow => Lsedrv::MEDIUMLOW,
LseDrive::MediumHigh => Lsedrv::MEDIUMHIGH,
#[cfg(any(rtc_v2f7, rtc_v2l4))]
LseDrive::High => Lsedrv::HIGH,
}
}
}
#[allow(dead_code)]
#[derive(Copy, Clone, Debug, PartialEq)]
#[repr(u8)]
#[allow(dead_code)]
pub enum RtcClockSource {
/// 00: No clock
NoClock = 0b00,
@ -66,6 +94,38 @@ impl BackupDomain {
r
}
#[allow(dead_code, unused_variables)]
#[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb))]
pub fn enable_lse(lse_drive: LseDrive) {
Self::modify(|w| {
#[cfg(any(rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l4))]
w.set_lsedrv(lse_drive.into());
w.set_lseon(true);
});
while !Self::read().lserdy() {}
}
#[allow(dead_code)]
#[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb))]
pub fn enable_lsi() {
let csr = crate::pac::RCC.csr();
Self::modify(|_| {
#[cfg(not(rtc_v2wb))]
csr.modify(|w| w.set_lsion(true));
#[cfg(rtc_v2wb)]
csr.modify(|w| w.set_lsi1on(true));
});
#[cfg(not(rtc_v2wb))]
while !csr.read().lsirdy() {}
#[cfg(rtc_v2wb)]
while !csr.read().lsi1rdy() {}
}
#[cfg(any(
rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
rtc_v3u5
@ -74,7 +134,7 @@ impl BackupDomain {
pub fn set_rtc_clock_source(clock_source: RtcClockSource) {
let clock_source = clock_source as u8;
#[cfg(any(
all(not(any(rtc_v3, rtc_v3u5)), not(rtc_v2wb)),
not(any(rtc_v3, rtc_v3u5, rtc_v2wb)),
all(any(rtc_v3, rtc_v3u5), not(any(rcc_wl5, rcc_wle)))
))]
let clock_source = crate::pac::rcc::vals::Rtcsel::from_bits(clock_source);
@ -86,6 +146,18 @@ impl BackupDomain {
});
}
#[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb))]
#[allow(dead_code, unused_variables)]
pub fn configure_rtc(clock_source: RtcClockSource, lse_drive: Option<LseDrive>) {
match clock_source {
RtcClockSource::LSI => Self::enable_lsi(),
RtcClockSource::LSE => Self::enable_lse(lse_drive.unwrap_or_default()),
_ => {}
};
Self::set_rtc_clock_source(clock_source);
}
#[cfg(any(
rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
rtc_v3u5