nrf/rng: make available on all chips, use Instance trait, switch to new interrupt binding.
This commit is contained in:
parent
96788ac93a
commit
d113fcfe32
@ -142,6 +142,8 @@ impl_twis!(TWI0, TWIS0, TWIM0_TWIS0_TWI0);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_rng!(RNG, RNG, RNG);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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@ -152,6 +152,8 @@ impl_pdm!(PDM, PDM, PDM);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_rng!(RNG, RNG, RNG);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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@ -154,6 +154,8 @@ impl_pdm!(PDM, PDM, PDM);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_rng!(RNG, RNG, RNG);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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@ -155,6 +155,8 @@ impl_timer!(TIMER3, TIMER3, TIMER3, extended);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_rng!(RNG, RNG, RNG);
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impl_pin!(P0_00, 0, 0);
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impl_pin!(P0_00, 0, 0);
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impl_pin!(P0_01, 0, 1);
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impl_pin!(P0_01, 0, 1);
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impl_pin!(P0_02, 0, 2);
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impl_pin!(P0_02, 0, 2);
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@ -175,6 +175,8 @@ impl_pdm!(PDM, PDM, PDM);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_rng!(RNG, RNG, RNG);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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@ -201,6 +201,8 @@ impl_pdm!(PDM, PDM, PDM);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_rng!(RNG, RNG, RNG);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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@ -212,6 +212,8 @@ impl_pdm!(PDM, PDM, PDM);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_qdec!(QDEC, QDEC, QDEC);
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impl_rng!(RNG, RNG, RNG);
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impl_pin!(P0_00, 0, 0);
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impl_pin!(P0_00, 0, 0);
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impl_pin!(P0_01, 0, 1);
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impl_pin!(P0_01, 0, 1);
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impl_pin!(P0_02, 0, 2);
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impl_pin!(P0_02, 0, 2);
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@ -127,6 +127,9 @@ embassy_hal_common::peripherals! {
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// SAADC
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// SAADC
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SAADC,
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SAADC,
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// RNG
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RNG,
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// PWM
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// PWM
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PWM0,
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PWM0,
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PWM1,
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PWM1,
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@ -252,6 +255,8 @@ impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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impl_rng!(RNG, RNG, RNG);
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impl_pin!(P0_00, 0, 0);
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impl_pin!(P0_00, 0, 0);
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impl_pin!(P0_01, 0, 1);
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impl_pin!(P0_01, 0, 1);
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impl_pin!(P0_02, 0, 2);
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impl_pin!(P0_02, 0, 2);
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@ -61,7 +61,7 @@ pub mod pwm;
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pub mod qdec;
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pub mod qdec;
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#[cfg(any(feature = "nrf52840", feature = "_nrf5340-app"))]
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#[cfg(any(feature = "nrf52840", feature = "_nrf5340-app"))]
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pub mod qspi;
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pub mod qspi;
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#[cfg(not(any(feature = "_nrf5340", feature = "_nrf9160")))]
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#[cfg(not(any(feature = "_nrf5340-app", feature = "_nrf9160")))]
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pub mod rng;
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pub mod rng;
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#[cfg(not(any(feature = "nrf52820", feature = "_nrf5340-net")))]
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#[cfg(not(any(feature = "nrf52820", feature = "_nrf5340-net")))]
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pub mod saadc;
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pub mod saadc;
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@ -1,83 +1,48 @@
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//! Random Number Generator (RNG) driver.
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//! Random Number Generator (RNG) driver.
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#![macro_use]
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use core::future::poll_fn;
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use core::future::poll_fn;
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use core::marker::PhantomData;
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use core::ptr;
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use core::ptr;
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use core::sync::atomic::{AtomicPtr, Ordering};
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use core::sync::atomic::{AtomicPtr, Ordering};
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use core::task::Poll;
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use core::task::Poll;
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_hal_common::drop::OnDrop;
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use embassy_hal_common::drop::OnDrop;
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use embassy_hal_common::{into_ref, PeripheralRef};
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use embassy_hal_common::{into_ref, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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use embassy_sync::waitqueue::AtomicWaker;
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use crate::interrupt::InterruptExt;
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use crate::interrupt::InterruptExt;
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use crate::peripherals::RNG;
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use crate::{interrupt, Peripheral};
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use crate::{interrupt, pac, Peripheral};
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impl RNG {
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/// Interrupt handler.
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fn regs() -> &'static pac::rng::RegisterBlock {
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pub struct InterruptHandler<T: Instance> {
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unsafe { &*pac::RNG::ptr() }
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_phantom: PhantomData<T>,
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}
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}
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}
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static STATE: State = State {
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impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> {
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ptr: AtomicPtr::new(ptr::null_mut()),
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unsafe fn on_interrupt() {
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end: AtomicPtr::new(ptr::null_mut()),
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let s = T::state();
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waker: AtomicWaker::new(),
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let r = T::regs();
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};
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struct State {
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ptr: AtomicPtr<u8>,
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end: AtomicPtr<u8>,
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waker: AtomicWaker,
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}
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/// A wrapper around an nRF RNG peripheral.
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///
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/// It has a non-blocking API, and a blocking api through `rand`.
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pub struct Rng<'d> {
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irq: PeripheralRef<'d, interrupt::RNG>,
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}
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impl<'d> Rng<'d> {
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/// Creates a new RNG driver from the `RNG` peripheral and interrupt.
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///
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/// SAFETY: The future returned from `fill_bytes` must not have its lifetime end without running its destructor,
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/// e.g. using `mem::forget`.
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///
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/// The synchronous API is safe.
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pub fn new(_rng: impl Peripheral<P = RNG> + 'd, irq: impl Peripheral<P = interrupt::RNG> + 'd) -> Self {
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into_ref!(irq);
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let this = Self { irq };
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this.stop();
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this.disable_irq();
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this.irq.set_handler(Self::on_interrupt);
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this.irq.unpend();
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this.irq.enable();
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this
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}
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fn on_interrupt(_: *mut ()) {
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// Clear the event.
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// Clear the event.
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RNG::regs().events_valrdy.reset();
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r.events_valrdy.reset();
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// Mutate the slice within a critical section,
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// Mutate the slice within a critical section,
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// so that the future isn't dropped in between us loading the pointer and actually dereferencing it.
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// so that the future isn't dropped in between us loading the pointer and actually dereferencing it.
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let (ptr, end) = critical_section::with(|_| {
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let (ptr, end) = critical_section::with(|_| {
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let ptr = STATE.ptr.load(Ordering::Relaxed);
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let ptr = s.ptr.load(Ordering::Relaxed);
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// We need to make sure we haven't already filled the whole slice,
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// We need to make sure we haven't already filled the whole slice,
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// in case the interrupt fired again before the executor got back to the future.
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// in case the interrupt fired again before the executor got back to the future.
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let end = STATE.end.load(Ordering::Relaxed);
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let end = s.end.load(Ordering::Relaxed);
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if !ptr.is_null() && ptr != end {
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if !ptr.is_null() && ptr != end {
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// If the future was dropped, the pointer would have been set to null,
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// If the future was dropped, the pointer would have been set to null,
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// so we're still good to mutate the slice.
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// so we're still good to mutate the slice.
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// The safety contract of `Rng::new` means that the future can't have been dropped
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// The safety contract of `Rng::new` means that the future can't have been dropped
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// without calling its destructor.
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// without calling its destructor.
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unsafe {
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unsafe {
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*ptr = RNG::regs().value.read().value().bits();
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*ptr = r.value.read().value().bits();
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}
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}
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}
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}
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(ptr, end)
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(ptr, end)
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@ -90,15 +55,15 @@ impl<'d> Rng<'d> {
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}
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}
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let new_ptr = unsafe { ptr.add(1) };
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let new_ptr = unsafe { ptr.add(1) };
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match STATE
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match s
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.ptr
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.ptr
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.compare_exchange(ptr, new_ptr, Ordering::Relaxed, Ordering::Relaxed)
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.compare_exchange(ptr, new_ptr, Ordering::Relaxed, Ordering::Relaxed)
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{
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{
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Ok(_) => {
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Ok(_) => {
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let end = STATE.end.load(Ordering::Relaxed);
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let end = s.end.load(Ordering::Relaxed);
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// It doesn't matter if `end` was changed under our feet, because then this will just be false.
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// It doesn't matter if `end` was changed under our feet, because then this will just be false.
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if new_ptr == end {
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if new_ptr == end {
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STATE.waker.wake();
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s.waker.wake();
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}
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}
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}
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}
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Err(_) => {
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Err(_) => {
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@ -107,21 +72,53 @@ impl<'d> Rng<'d> {
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}
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}
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}
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}
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}
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}
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}
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/// A wrapper around an nRF RNG peripheral.
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///
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/// It has a non-blocking API, and a blocking api through `rand`.
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pub struct Rng<'d, T: Instance> {
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_peri: PeripheralRef<'d, T>,
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}
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impl<'d, T: Instance> Rng<'d, T> {
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/// Creates a new RNG driver from the `RNG` peripheral and interrupt.
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///
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/// SAFETY: The future returned from `fill_bytes` must not have its lifetime end without running its destructor,
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/// e.g. using `mem::forget`.
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///
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/// The synchronous API is safe.
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pub fn new(
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rng: impl Peripheral<P = T> + 'd,
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_irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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) -> Self {
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into_ref!(rng);
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let this = Self { _peri: rng };
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this.stop();
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this.disable_irq();
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unsafe { T::Interrupt::steal() }.unpend();
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unsafe { T::Interrupt::steal() }.enable();
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this
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}
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fn stop(&self) {
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fn stop(&self) {
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RNG::regs().tasks_stop.write(|w| unsafe { w.bits(1) })
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T::regs().tasks_stop.write(|w| unsafe { w.bits(1) })
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}
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}
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fn start(&self) {
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fn start(&self) {
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RNG::regs().tasks_start.write(|w| unsafe { w.bits(1) })
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T::regs().tasks_start.write(|w| unsafe { w.bits(1) })
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}
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}
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fn enable_irq(&self) {
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fn enable_irq(&self) {
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RNG::regs().intenset.write(|w| w.valrdy().set());
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T::regs().intenset.write(|w| w.valrdy().set());
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}
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}
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fn disable_irq(&self) {
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fn disable_irq(&self) {
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RNG::regs().intenclr.write(|w| w.valrdy().clear());
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T::regs().intenclr.write(|w| w.valrdy().clear());
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}
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}
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/// Enable or disable the RNG's bias correction.
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/// Enable or disable the RNG's bias correction.
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@ -131,7 +128,7 @@ impl<'d> Rng<'d> {
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///
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///
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/// Defaults to disabled.
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/// Defaults to disabled.
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pub fn set_bias_correction(&self, enable: bool) {
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pub fn set_bias_correction(&self, enable: bool) {
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RNG::regs().config.write(|w| w.dercen().bit(enable))
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T::regs().config.write(|w| w.dercen().bit(enable))
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}
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}
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/// Fill the buffer with random bytes.
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/// Fill the buffer with random bytes.
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@ -140,11 +137,13 @@ impl<'d> Rng<'d> {
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return; // Nothing to fill
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return; // Nothing to fill
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}
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}
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let s = T::state();
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let range = dest.as_mut_ptr_range();
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let range = dest.as_mut_ptr_range();
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// Even if we've preempted the interrupt, it can't preempt us again,
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// Even if we've preempted the interrupt, it can't preempt us again,
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// so we don't need to worry about the order we write these in.
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// so we don't need to worry about the order we write these in.
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STATE.ptr.store(range.start, Ordering::Relaxed);
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s.ptr.store(range.start, Ordering::Relaxed);
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STATE.end.store(range.end, Ordering::Relaxed);
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s.end.store(range.end, Ordering::Relaxed);
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self.enable_irq();
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self.enable_irq();
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self.start();
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self.start();
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@ -154,16 +153,16 @@ impl<'d> Rng<'d> {
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self.disable_irq();
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self.disable_irq();
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// The interrupt is now disabled and can't preempt us anymore, so the order doesn't matter here.
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// The interrupt is now disabled and can't preempt us anymore, so the order doesn't matter here.
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STATE.ptr.store(ptr::null_mut(), Ordering::Relaxed);
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s.ptr.store(ptr::null_mut(), Ordering::Relaxed);
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STATE.end.store(ptr::null_mut(), Ordering::Relaxed);
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s.end.store(ptr::null_mut(), Ordering::Relaxed);
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});
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});
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poll_fn(|cx| {
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poll_fn(|cx| {
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STATE.waker.register(cx.waker());
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s.waker.register(cx.waker());
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// The interrupt will never modify `end`, so load it first and then get the most up-to-date `ptr`.
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// The interrupt will never modify `end`, so load it first and then get the most up-to-date `ptr`.
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let end = STATE.end.load(Ordering::Relaxed);
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let end = s.end.load(Ordering::Relaxed);
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let ptr = STATE.ptr.load(Ordering::Relaxed);
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let ptr = s.ptr.load(Ordering::Relaxed);
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if ptr == end {
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if ptr == end {
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// We're done.
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// We're done.
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@ -183,7 +182,7 @@ impl<'d> Rng<'d> {
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self.start();
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self.start();
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for byte in dest.iter_mut() {
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for byte in dest.iter_mut() {
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let regs = RNG::regs();
|
let regs = T::regs();
|
||||||
while regs.events_valrdy.read().bits() == 0 {}
|
while regs.events_valrdy.read().bits() == 0 {}
|
||||||
regs.events_valrdy.reset();
|
regs.events_valrdy.reset();
|
||||||
*byte = regs.value.read().value().bits();
|
*byte = regs.value.read().value().bits();
|
||||||
@ -193,13 +192,16 @@ impl<'d> Rng<'d> {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d> Drop for Rng<'d> {
|
impl<'d, T: Instance> Drop for Rng<'d, T> {
|
||||||
fn drop(&mut self) {
|
fn drop(&mut self) {
|
||||||
self.irq.disable()
|
self.stop();
|
||||||
|
let s = T::state();
|
||||||
|
s.ptr.store(ptr::null_mut(), Ordering::Relaxed);
|
||||||
|
s.end.store(ptr::null_mut(), Ordering::Relaxed);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d> rand_core::RngCore for Rng<'d> {
|
impl<'d, T: Instance> rand_core::RngCore for Rng<'d, T> {
|
||||||
fn fill_bytes(&mut self, dest: &mut [u8]) {
|
fn fill_bytes(&mut self, dest: &mut [u8]) {
|
||||||
self.blocking_fill_bytes(dest);
|
self.blocking_fill_bytes(dest);
|
||||||
}
|
}
|
||||||
@ -223,4 +225,53 @@ impl<'d> rand_core::RngCore for Rng<'d> {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d> rand_core::CryptoRng for Rng<'d> {}
|
impl<'d, T: Instance> rand_core::CryptoRng for Rng<'d, T> {}
|
||||||
|
|
||||||
|
pub(crate) mod sealed {
|
||||||
|
use super::*;
|
||||||
|
|
||||||
|
/// Peripheral static state
|
||||||
|
pub struct State {
|
||||||
|
pub ptr: AtomicPtr<u8>,
|
||||||
|
pub end: AtomicPtr<u8>,
|
||||||
|
pub waker: AtomicWaker,
|
||||||
|
}
|
||||||
|
|
||||||
|
impl State {
|
||||||
|
pub const fn new() -> Self {
|
||||||
|
Self {
|
||||||
|
ptr: AtomicPtr::new(ptr::null_mut()),
|
||||||
|
end: AtomicPtr::new(ptr::null_mut()),
|
||||||
|
waker: AtomicWaker::new(),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
pub trait Instance {
|
||||||
|
fn regs() -> &'static crate::pac::rng::RegisterBlock;
|
||||||
|
fn state() -> &'static State;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/// RNG peripheral instance.
|
||||||
|
pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send {
|
||||||
|
/// Interrupt for this peripheral.
|
||||||
|
type Interrupt: Interrupt;
|
||||||
|
}
|
||||||
|
|
||||||
|
macro_rules! impl_rng {
|
||||||
|
($type:ident, $pac_type:ident, $irq:ident) => {
|
||||||
|
impl crate::rng::sealed::Instance for peripherals::$type {
|
||||||
|
fn regs() -> &'static crate::pac::rng::RegisterBlock {
|
||||||
|
unsafe { &*pac::$pac_type::ptr() }
|
||||||
|
}
|
||||||
|
fn state() -> &'static crate::rng::sealed::State {
|
||||||
|
static STATE: crate::rng::sealed::State = crate::rng::sealed::State::new();
|
||||||
|
&STATE
|
||||||
|
}
|
||||||
|
}
|
||||||
|
impl crate::rng::Instance for peripherals::$type {
|
||||||
|
type Interrupt = crate::interrupt::$irq;
|
||||||
|
}
|
||||||
|
};
|
||||||
|
}
|
||||||
|
@ -3,15 +3,19 @@
|
|||||||
#![feature(type_alias_impl_trait)]
|
#![feature(type_alias_impl_trait)]
|
||||||
|
|
||||||
use embassy_executor::Spawner;
|
use embassy_executor::Spawner;
|
||||||
use embassy_nrf::interrupt;
|
|
||||||
use embassy_nrf::rng::Rng;
|
use embassy_nrf::rng::Rng;
|
||||||
|
use embassy_nrf::{bind_interrupts, peripherals, rng};
|
||||||
use rand::Rng as _;
|
use rand::Rng as _;
|
||||||
use {defmt_rtt as _, panic_probe as _};
|
use {defmt_rtt as _, panic_probe as _};
|
||||||
|
|
||||||
|
bind_interrupts!(struct Irqs {
|
||||||
|
RNG => rng::InterruptHandler<peripherals::RNG>;
|
||||||
|
});
|
||||||
|
|
||||||
#[embassy_executor::main]
|
#[embassy_executor::main]
|
||||||
async fn main(_spawner: Spawner) {
|
async fn main(_spawner: Spawner) {
|
||||||
let p = embassy_nrf::init(Default::default());
|
let p = embassy_nrf::init(Default::default());
|
||||||
let mut rng = Rng::new(p.RNG, interrupt::take!(RNG));
|
let mut rng = Rng::new(p.RNG, Irqs);
|
||||||
|
|
||||||
// Async API
|
// Async API
|
||||||
let mut bytes = [0; 4];
|
let mut bytes = [0; 4];
|
||||||
|
@ -10,7 +10,7 @@ use embassy_net::tcp::TcpSocket;
|
|||||||
use embassy_net::{Stack, StackResources};
|
use embassy_net::{Stack, StackResources};
|
||||||
use embassy_nrf::rng::Rng;
|
use embassy_nrf::rng::Rng;
|
||||||
use embassy_nrf::usb::{Driver, HardwareVbusDetect};
|
use embassy_nrf::usb::{Driver, HardwareVbusDetect};
|
||||||
use embassy_nrf::{interrupt, pac, peripherals};
|
use embassy_nrf::{bind_interrupts, interrupt, pac, peripherals, rng};
|
||||||
use embassy_usb::class::cdc_ncm::embassy_net::{Device, Runner, State as NetState};
|
use embassy_usb::class::cdc_ncm::embassy_net::{Device, Runner, State as NetState};
|
||||||
use embassy_usb::class::cdc_ncm::{CdcNcmClass, State};
|
use embassy_usb::class::cdc_ncm::{CdcNcmClass, State};
|
||||||
use embassy_usb::{Builder, Config, UsbDevice};
|
use embassy_usb::{Builder, Config, UsbDevice};
|
||||||
@ -18,6 +18,10 @@ use embedded_io::asynch::Write;
|
|||||||
use static_cell::StaticCell;
|
use static_cell::StaticCell;
|
||||||
use {defmt_rtt as _, panic_probe as _};
|
use {defmt_rtt as _, panic_probe as _};
|
||||||
|
|
||||||
|
bind_interrupts!(struct Irqs {
|
||||||
|
RNG => rng::InterruptHandler<peripherals::RNG>;
|
||||||
|
});
|
||||||
|
|
||||||
type MyDriver = Driver<'static, peripherals::USBD, HardwareVbusDetect>;
|
type MyDriver = Driver<'static, peripherals::USBD, HardwareVbusDetect>;
|
||||||
|
|
||||||
macro_rules! singleton {
|
macro_rules! singleton {
|
||||||
@ -108,7 +112,7 @@ async fn main(spawner: Spawner) {
|
|||||||
//});
|
//});
|
||||||
|
|
||||||
// Generate random seed
|
// Generate random seed
|
||||||
let mut rng = Rng::new(p.RNG, interrupt::take!(RNG));
|
let mut rng = Rng::new(p.RNG, Irqs);
|
||||||
let mut seed = [0; 8];
|
let mut seed = [0; 8];
|
||||||
rng.blocking_fill_bytes(&mut seed);
|
rng.blocking_fill_bytes(&mut seed);
|
||||||
let seed = u64::from_le_bytes(seed);
|
let seed = u64::from_le_bytes(seed);
|
||||||
|
Loading…
Reference in New Issue
Block a user