diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs
index f55123e1..e04b3ea0 100644
--- a/embassy-stm32/src/usart/buffered.rs
+++ b/embassy-stm32/src/usart/buffered.rs
@@ -48,7 +48,8 @@ impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for Interrupt
                 if !buf.is_empty() {
                     buf[0] = dr.unwrap();
                     rx_writer.push_done(1);
-                } else {
+                }
+                else {
                     // FIXME: Should we disable any further RX interrupts when the buffer becomes full.
                 }