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chemicstry 2022-03-17 19:41:44 +02:00
parent 051c6350ea
commit d26b751edc
1 changed files with 4 additions and 0 deletions
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4
embassy-stm32/src/usart/mod.rs
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@ -106,6 +106,8 @@ impl<'d, T: Instance, TxDma> UartTx<'d, T, TxDma> {
reg.set_dmat(true); reg.set_dmat(true);
}); });
} }
// If we don't assign future to a variable, the data register pointer
// is held across an await and makes the future non-Send.
let transfer = crate::dma::write(ch, request, buffer, tdr(T::regs())); let transfer = crate::dma::write(ch, request, buffer, tdr(T::regs()));
transfer.await; transfer.await;
Ok(()) Ok(())
@ -150,6 +152,8 @@ impl<'d, T: Instance, RxDma> UartRx<'d, T, RxDma> {
reg.set_dmar(true); reg.set_dmar(true);
}); });
} }
// If we don't assign future to a variable, the data register pointer
// is held across an await and makes the future non-Send.
let transfer = crate::dma::read(ch, request, rdr(T::regs()), buffer); let transfer = crate::dma::read(ch, request, rdr(T::regs()), buffer);
transfer.await; transfer.await;
Ok(()) Ok(())