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Merge pull request #2090 from eZioPan/rcc-init-bypass-oden

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bypass `ODEN` in `rcc::init()` if chip doesn't have it
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Dario Nieuwenhuis 2023-10-18 12:15:30 +00:00 committed by GitHub
commit d496a1213c
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1 changed files with 11 additions and 5 deletions
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8
embassy-stm32/src/rcc/f4f7.rs
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@ -2,7 +2,7 @@ pub use crate::pac::rcc::vals::{
Hpre as AHBPrescaler, Pllm as PllPreDiv, Plln as PllMul, Pllp, Pllq, Pllr, Pllsrc as PllSource, Hpre as AHBPrescaler, Pllm as PllPreDiv, Plln as PllMul, Pllp, Pllq, Pllr, Pllsrc as PllSource,
Ppre as APBPrescaler, Sw as Sysclk, Ppre as APBPrescaler, Sw as Sysclk,
}; };
use crate::pac::{FLASH, PWR, RCC}; use crate::pac::{FLASH, RCC};
use crate::rcc::{set_freqs, Clocks}; use crate::rcc::{set_freqs, Clocks};
use crate::time::Hertz; use crate::time::Hertz;
@ -101,11 +101,17 @@ impl Default for Config {
pub(crate) unsafe fn init(config: Config) { pub(crate) unsafe fn init(config: Config) {
// always enable overdrive for now. Make it configurable in the future. // always enable overdrive for now. Make it configurable in the future.
#[cfg(not(any(
stm32f401, stm32f410, stm32f411, stm32f412, stm32f413, stm32f423, stm32f405, stm32f407, stm32f415, stm32f417
)))]
{
use crate::pac::PWR;
PWR.cr1().modify(|w| w.set_oden(true)); PWR.cr1().modify(|w| w.set_oden(true));
while !PWR.csr1().read().odrdy() {} while !PWR.csr1().read().odrdy() {}
PWR.cr1().modify(|w| w.set_odswen(true)); PWR.cr1().modify(|w| w.set_odswen(true));
while !PWR.csr1().read().odswrdy() {} while !PWR.csr1().read().odswrdy() {}
}
// Configure HSI // Configure HSI
let hsi = match config.hsi { let hsi = match config.hsi {