net-w5500: integrate into main repo.

This commit is contained in:
Dario Nieuwenhuis
2023-05-31 01:01:30 +02:00
parent 82d765689a
commit d70994e4a8
10 changed files with 55 additions and 149 deletions

View File

@ -1,6 +1,7 @@
use embedded_hal_async::spi::SpiDevice;
use crate::socket;
use crate::spi::SpiInterface;
use embedded_hal_async::spi::SpiDevice;
pub const MODE: u16 = 0x00;
pub const MAC: u16 = 0x09;
@ -27,12 +28,10 @@ impl<SPI: SpiDevice> W5500<SPI> {
pub async fn new(spi: SPI, mac_addr: [u8; 6]) -> Result<W5500<SPI>, SPI::Error> {
let mut bus = SpiInterface(spi);
// Reset device
bus.write_frame(RegisterBlock::Common, MODE, &[0x80])
.await?;
bus.write_frame(RegisterBlock::Common, MODE, &[0x80]).await?;
// Enable interrupt pin
bus.write_frame(RegisterBlock::Common, SOCKET_INTR, &[0x01])
.await?;
bus.write_frame(RegisterBlock::Common, SOCKET_INTR, &[0x01]).await?;
// Enable receive interrupt
bus.write_frame(
RegisterBlock::Socket0,
@ -42,8 +41,7 @@ impl<SPI: SpiDevice> W5500<SPI> {
.await?;
// Set MAC address
bus.write_frame(RegisterBlock::Common, MAC, &mac_addr)
.await?;
bus.write_frame(RegisterBlock::Common, MAC, &mac_addr).await?;
// Set the raw socket RX/TX buffer sizes to 16KB
bus.write_frame(RegisterBlock::Socket0, socket::TXBUF_SIZE, &[16])
@ -53,8 +51,7 @@ impl<SPI: SpiDevice> W5500<SPI> {
// MACRAW mode with MAC filtering.
let mode: u8 = (1 << 2) | (1 << 7);
bus.write_frame(RegisterBlock::Socket0, socket::MODE, &[mode])
.await?;
bus.write_frame(RegisterBlock::Socket0, socket::MODE, &[mode]).await?;
socket::command(&mut bus, socket::Command::Open).await?;
Ok(Self { bus })
@ -70,17 +67,9 @@ impl<SPI: SpiDevice> W5500<SPI> {
&mut buffer[..rx_size - offset as usize]
};
let read_ptr = socket::get_rx_read_ptr(&mut self.bus)
.await?
.wrapping_add(offset);
self.bus
.read_frame(RegisterBlock::RxBuf, read_ptr, read_buffer)
.await?;
socket::set_rx_read_ptr(
&mut self.bus,
read_ptr.wrapping_add(read_buffer.len() as u16),
)
.await?;
let read_ptr = socket::get_rx_read_ptr(&mut self.bus).await?.wrapping_add(offset);
self.bus.read_frame(RegisterBlock::RxBuf, read_ptr, read_buffer).await?;
socket::set_rx_read_ptr(&mut self.bus, read_ptr.wrapping_add(read_buffer.len() as u16)).await?;
Ok(read_buffer.len())
}
@ -125,9 +114,7 @@ impl<SPI: SpiDevice> W5500<SPI> {
pub async fn write_frame(&mut self, frame: &[u8]) -> Result<usize, SPI::Error> {
while socket::get_tx_free_size(&mut self.bus).await? < frame.len() as u16 {}
let write_ptr = socket::get_tx_write_ptr(&mut self.bus).await?;
self.bus
.write_frame(RegisterBlock::TxBuf, write_ptr, frame)
.await?;
self.bus.write_frame(RegisterBlock::TxBuf, write_ptr, frame).await?;
socket::set_tx_write_ptr(&mut self.bus, write_ptr.wrapping_add(frame.len() as u16)).await?;
socket::command(&mut self.bus, socket::Command::Send).await?;
Ok(frame.len())