From 218f8e049096341c459de8d39146d59117d20d69 Mon Sep 17 00:00:00 2001 From: Rasmus Melchior Jacobsen Date: Tue, 7 Feb 2023 12:17:37 +0100 Subject: [PATCH 1/6] fix(stm32): Align FMC with new versions from stm32-data --- embassy-stm32/src/fmc/mod.rs | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/fmc/mod.rs b/embassy-stm32/src/fmc/mod.rs index 856a4adc..0c546104 100644 --- a/embassy-stm32/src/fmc/mod.rs +++ b/embassy-stm32/src/fmc/mod.rs @@ -27,9 +27,13 @@ where } fn memory_controller_enable(&mut self) { - // The FMCEN bit of the FMC_BCR2..4 registers is don’t - // care. It is only enabled through the FMC_BCR1 register. - unsafe { T::regs().bcr1().modify(|r| r.set_fmcen(true)) }; + // fmc v1 and v2 does not have the fmcen bit + // fsmc v1 and v2 does not have the fmcen bit + // This is a "not" because it is expected that all future versions have this bit + #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x3, fsmc_v2x1)))] + unsafe { + T::regs().bcr1().modify(|r| r.set_fmcen(true)) + }; } fn source_clock_hz(&self) -> u32 { From 36ca18132dd525bc2a3cdac0246834a2aae07ca9 Mon Sep 17 00:00:00 2001 From: Rasmus Melchior Jacobsen Date: Tue, 7 Feb 2023 12:35:59 +0100 Subject: [PATCH 2/6] Update stm32-data --- stm32-data | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/stm32-data b/stm32-data index 96decdd6..fe4a068e 160000 --- a/stm32-data +++ b/stm32-data @@ -1 +1 @@ -Subproject commit 96decdd6114d78813c1f748fb878a45e1b03bf73 +Subproject commit fe4a068eaf1b39c60eddea7d74c90182b44c5d08 From 494a76a0f1be2fb35000c7a088f9bda21c73ad9e Mon Sep 17 00:00:00 2001 From: Rasmus Melchior Jacobsen Date: Tue, 7 Feb 2023 14:14:47 +0100 Subject: [PATCH 3/6] React to updated fsmc versions --- embassy-stm32/src/fmc/mod.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/fmc/mod.rs b/embassy-stm32/src/fmc/mod.rs index 0c546104..13c16af5 100644 --- a/embassy-stm32/src/fmc/mod.rs +++ b/embassy-stm32/src/fmc/mod.rs @@ -28,9 +28,9 @@ where fn memory_controller_enable(&mut self) { // fmc v1 and v2 does not have the fmcen bit - // fsmc v1 and v2 does not have the fmcen bit + // fsmc v1, v2 and v3 does not have the fmcen bit // This is a "not" because it is expected that all future versions have this bit - #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x3, fsmc_v2x1)))] + #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x0, fsmc_v2x3, fsmc_v3x1)))] unsafe { T::regs().bcr1().modify(|r| r.set_fmcen(true)) }; From 562432ad8b9380cff7a536105b9877cdd8044870 Mon Sep 17 00:00:00 2001 From: Rasmus Melchior Jacobsen Date: Tue, 7 Feb 2023 14:16:13 +0100 Subject: [PATCH 4/6] Update stm32-data --- stm32-data | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/stm32-data b/stm32-data index fe4a068e..ae8c8ed9 160000 --- a/stm32-data +++ b/stm32-data @@ -1 +1 @@ -Subproject commit fe4a068eaf1b39c60eddea7d74c90182b44c5d08 +Subproject commit ae8c8ed9dbde5eca7c5c74bd926f7ce77526dae1 From e4dc473e04ba2981cffd16ce4348f0646cae341d Mon Sep 17 00:00:00 2001 From: Rasmus Melchior Jacobsen Date: Tue, 7 Feb 2023 14:46:36 +0100 Subject: [PATCH 5/6] Update stm32-data --- stm32-data | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/stm32-data b/stm32-data index ae8c8ed9..cc93f9d1 160000 --- a/stm32-data +++ b/stm32-data @@ -1 +1 @@ -Subproject commit ae8c8ed9dbde5eca7c5c74bd926f7ce77526dae1 +Subproject commit cc93f9d10395077770bebefb6b9488e06b0e5811 From 1b6aae9ddea09bf961d9cbe4a976f3021749e4ac Mon Sep 17 00:00:00 2001 From: Rasmus Melchior Jacobsen Date: Tue, 7 Feb 2023 15:06:16 +0100 Subject: [PATCH 6/6] Also exclude fsmc_v1x3 --- embassy-stm32/src/fmc/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/fmc/mod.rs b/embassy-stm32/src/fmc/mod.rs index 13c16af5..4d48721d 100644 --- a/embassy-stm32/src/fmc/mod.rs +++ b/embassy-stm32/src/fmc/mod.rs @@ -30,7 +30,7 @@ where // fmc v1 and v2 does not have the fmcen bit // fsmc v1, v2 and v3 does not have the fmcen bit // This is a "not" because it is expected that all future versions have this bit - #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x0, fsmc_v2x3, fsmc_v3x1)))] + #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x0, fsmc_v1x3, fsmc_v2x3, fsmc_v3x1)))] unsafe { T::regs().bcr1().modify(|r| r.set_fmcen(true)) };