From db16b6ff3f94e48f50c4212c164d018741b61b42 Mon Sep 17 00:00:00 2001 From: pennae Date: Tue, 25 Apr 2023 18:48:36 +0200 Subject: [PATCH] rp/pio: don't call dma::init so much this is already done during platform init. it wasn't even sound in the original implementation because futures would meddle with the nvic in critical sections, while another (interrupt) executor could meddle with the nvic without critical sections here. it is only accidentally sound now and only if irq1 of both pios isn't used by user code. luckily the worst we can expect to happen is interrupt priorities being set wrong, but wrong is wrong is wrong. --- embassy-rp/src/pio.rs | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/embassy-rp/src/pio.rs b/embassy-rp/src/pio.rs index 00a7aa37..3775060f 100644 --- a/embassy-rp/src/pio.rs +++ b/embassy-rp/src/pio.rs @@ -8,7 +8,7 @@ use embassy_cortex_m::interrupt::{Interrupt, InterruptExt}; use embassy_hal_common::PeripheralRef; use embassy_sync::waitqueue::AtomicWaker; -use crate::dma::{self, Channel, Transfer}; +use crate::dma::{Channel, Transfer}; use crate::gpio::sealed::Pin as SealedPin; use crate::gpio::{Drive, Pin, Pull, SlewRate}; use crate::pac::dma::vals::{DataSize, TreqSel}; @@ -949,7 +949,6 @@ pub trait PioStateMachine: Sized + Unpin { fn dma_push<'a, C: Channel>(&'a self, ch: PeripheralRef<'a, C>, data: &'a [u32]) -> Transfer<'a, C> { unsafe { - dma::init(); let pio_no = Self::Pio::PIO_NO; let sm_no = Self::Sm::SM_NO; let p = ch.regs(); @@ -973,7 +972,6 @@ pub trait PioStateMachine: Sized + Unpin { fn dma_pull<'a, C: Channel>(&'a self, ch: PeripheralRef<'a, C>, data: &'a mut [u32]) -> Transfer<'a, C> { unsafe { - dma::init(); let pio_no = Self::Pio::PIO_NO; let sm_no = Self::Sm::SM_NO; let p = ch.regs();