diff --git a/examples/nrf/.cargo/config.toml b/examples/nrf/.cargo/config.toml
index 0151d1ed..c75b5c53 100644
--- a/examples/nrf/.cargo/config.toml
+++ b/examples/nrf/.cargo/config.toml
@@ -2,17 +2,5 @@
 # replace nRF82840_xxAA with your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip nRF52840_xxAA"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv7em-none-eabi"
diff --git a/examples/nrf/build.rs b/examples/nrf/build.rs
index d534cc3d..30691aa9 100644
--- a/examples/nrf/build.rs
+++ b/examples/nrf/build.rs
@@ -28,4 +28,8 @@ fn main() {
     // here, we ensure the build script is only re-run when
     // `memory.x` is changed.
     println!("cargo:rerun-if-changed=memory.x");
+
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
 }
diff --git a/examples/rp/.cargo/config.toml b/examples/rp/.cargo/config.toml
index 9b852b8e..1ce57510 100644
--- a/examples/rp/.cargo/config.toml
+++ b/examples/rp/.cargo/config.toml
@@ -1,16 +1,5 @@
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
 runner = "probe-run-rp --chip RP2040"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tlink-rp.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-]
-
 [build]
 target = "thumbv6m-none-eabi"        # Cortex-M0 and Cortex-M0+
diff --git a/examples/rp/build.rs b/examples/rp/build.rs
index d534cc3d..3f915f93 100644
--- a/examples/rp/build.rs
+++ b/examples/rp/build.rs
@@ -28,4 +28,9 @@ fn main() {
     // here, we ensure the build script is only re-run when
     // `memory.x` is changed.
     println!("cargo:rerun-if-changed=memory.x");
+
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tlink-rp.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
 }
diff --git a/examples/std/Cargo.toml b/examples/std/Cargo.toml
index b494cd3b..002d0487 100644
--- a/examples/std/Cargo.toml
+++ b/examples/std/Cargo.toml
@@ -11,7 +11,7 @@ smoltcp = { git = "https://github.com/smoltcp-rs/smoltcp", rev="e4241510337e095b
 
 async-io = "1.6.0"
 env_logger = "0.9.0"
-futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
+futures = { version = "0.3.17" }
 log = "0.4.14"
 nix = "0.22.1"
 libc = "0.2.101"
diff --git a/examples/stm32f0/.cargo/config.toml b/examples/stm32f0/.cargo/config.toml
index 7506fa91..4d34270c 100644
--- a/examples/stm32f0/.cargo/config.toml
+++ b/examples/stm32f0/.cargo/config.toml
@@ -1,10 +1,5 @@
 [target.thumbv6m-none-eabi]
 runner = 'probe-run --chip STM32F030F4Px'
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-]
 
 [build]
 target = "thumbv6m-none-eabi"
diff --git a/examples/stm32f0/Cargo.toml b/examples/stm32f0/Cargo.toml
index 2db98488..e586748a 100644
--- a/examples/stm32f0/Cargo.toml
+++ b/examples/stm32f0/Cargo.toml
@@ -15,7 +15,7 @@ defmt-rtt = "0.2.0"
 panic-probe = "0.2.0"
 rtt-target = { version = "0.3.1", features = ["cortex-m"] }
 embassy = { path = "../../embassy", features = ["defmt"] }
-embassy-stm32 = { path = "../../embassy-stm32", features = ["defmt", "stm32f030f4", "time-driver-tim3"] }
+embassy-stm32 = { path = "../../embassy-stm32", features = ["defmt", "memory-x", "stm32f030f4", "time-driver-tim3"] }
 
 [features]
 default = [
diff --git a/examples/stm32f0/build.rs b/examples/stm32f0/build.rs
index d534cc3d..8cd32d7e 100644
--- a/examples/stm32f0/build.rs
+++ b/examples/stm32f0/build.rs
@@ -1,31 +1,5 @@
-//! This build script copies the `memory.x` file from the crate root into
-//! a directory where the linker can always find it at build time.
-//! For many projects this is optional, as the linker always searches the
-//! project root directory -- wherever `Cargo.toml` is. However, if you
-//! are using a workspace or have a more complicated build setup, this
-//! build script becomes required. Additionally, by requesting that
-//! Cargo re-run the build script whenever `memory.x` is changed,
-//! updating `memory.x` ensures a rebuild of the application with the
-//! new memory settings.
-
-use std::env;
-use std::fs::File;
-use std::io::Write;
-use std::path::PathBuf;
-
 fn main() {
-    // Put `memory.x` in our output directory and ensure it's
-    // on the linker search path.
-    let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
-    File::create(out.join("memory.x"))
-        .unwrap()
-        .write_all(include_bytes!("memory.x"))
-        .unwrap();
-    println!("cargo:rustc-link-search={}", out.display());
-
-    // By default, Cargo will re-run a build script whenever
-    // any file in the project changes. By specifying `memory.x`
-    // here, we ensure the build script is only re-run when
-    // `memory.x` is changed.
-    println!("cargo:rerun-if-changed=memory.x");
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
 }
diff --git a/examples/stm32f0/memory.x b/examples/stm32f0/memory.x
deleted file mode 100644
index 3bddaed4..00000000
--- a/examples/stm32f0/memory.x
+++ /dev/null
@@ -1,6 +0,0 @@
-MEMORY
-{
-  FLASH : ORIGIN = 0x08000000, LENGTH = 16K
-  /* DTCM  */
-  RAM : ORIGIN = 0x20000000, LENGTH = 4K
-}
diff --git a/examples/stm32f1/.cargo/config.toml b/examples/stm32f1/.cargo/config.toml
index 28df6138..9a7ac7b9 100644
--- a/examples/stm32f1/.cargo/config.toml
+++ b/examples/stm32f1/.cargo/config.toml
@@ -2,17 +2,5 @@
 # replace STM32F103C8 with your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip STM32F103C8"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv7m-none-eabi"
diff --git a/examples/stm32f1/build.rs b/examples/stm32f1/build.rs
new file mode 100644
index 00000000..8cd32d7e
--- /dev/null
+++ b/examples/stm32f1/build.rs
@@ -0,0 +1,5 @@
+fn main() {
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+}
diff --git a/examples/stm32f4/.cargo/config.toml b/examples/stm32f4/.cargo/config.toml
index 7563d261..9e0a1521 100644
--- a/examples/stm32f4/.cargo/config.toml
+++ b/examples/stm32f4/.cargo/config.toml
@@ -2,17 +2,5 @@
 # replace STM32F429ZITx with your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip STM32F429ZITx"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv7em-none-eabi"
diff --git a/examples/stm32f4/build.rs b/examples/stm32f4/build.rs
new file mode 100644
index 00000000..8cd32d7e
--- /dev/null
+++ b/examples/stm32f4/build.rs
@@ -0,0 +1,5 @@
+fn main() {
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+}
diff --git a/examples/stm32f7/.cargo/config.toml b/examples/stm32f7/.cargo/config.toml
index 632e8154..f490ed8e 100644
--- a/examples/stm32f7/.cargo/config.toml
+++ b/examples/stm32f7/.cargo/config.toml
@@ -2,17 +2,5 @@
 # replace STM32F429ZITx with your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip STM32F767ZITx"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv7em-none-eabihf"
diff --git a/examples/stm32f7/build.rs b/examples/stm32f7/build.rs
index b81f6b6e..b72dd55e 100644
--- a/examples/stm32f7/build.rs
+++ b/examples/stm32f7/build.rs
@@ -35,5 +35,9 @@ fn main() -> Result<(), Error> {
     // Tell Cargo where to find the file.
     println!("cargo:rustc-link-search={}", out_dir.display());
 
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+
     Ok(())
 }
diff --git a/examples/stm32g0/.cargo/config.toml b/examples/stm32g0/.cargo/config.toml
index 1f7c3ecd..3ebfbcb5 100644
--- a/examples/stm32g0/.cargo/config.toml
+++ b/examples/stm32g0/.cargo/config.toml
@@ -2,17 +2,5 @@
 # replace STM32G071C8Rx with your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip STM32G071RBTx"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv6m-none-eabi"
diff --git a/examples/stm32g0/build.rs b/examples/stm32g0/build.rs
index d534cc3d..30691aa9 100644
--- a/examples/stm32g0/build.rs
+++ b/examples/stm32g0/build.rs
@@ -28,4 +28,8 @@ fn main() {
     // here, we ensure the build script is only re-run when
     // `memory.x` is changed.
     println!("cargo:rerun-if-changed=memory.x");
+
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
 }
diff --git a/examples/stm32h7/.cargo/config b/examples/stm32h7/.cargo/config
index 6b6a9f50..4106112c 100644
--- a/examples/stm32h7/.cargo/config
+++ b/examples/stm32h7/.cargo/config
@@ -1,10 +1,5 @@
 [target.thumbv7em-none-eabihf]
 runner = 'probe-run --chip STM32H743ZITx'
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-]
 
 [build]
 target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
diff --git a/examples/stm32h7/build.rs b/examples/stm32h7/build.rs
new file mode 100644
index 00000000..8cd32d7e
--- /dev/null
+++ b/examples/stm32h7/build.rs
@@ -0,0 +1,5 @@
+fn main() {
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+}
diff --git a/examples/stm32l0/.cargo/config.toml b/examples/stm32l0/.cargo/config.toml
index 084722ca..4ea04748 100644
--- a/examples/stm32l0/.cargo/config.toml
+++ b/examples/stm32l0/.cargo/config.toml
@@ -2,17 +2,5 @@
 # replace your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip STM32L072CZ"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv6m-none-eabi"
diff --git a/examples/stm32l0/build.rs b/examples/stm32l0/build.rs
index d534cc3d..30691aa9 100644
--- a/examples/stm32l0/build.rs
+++ b/examples/stm32l0/build.rs
@@ -28,4 +28,8 @@ fn main() {
     // here, we ensure the build script is only re-run when
     // `memory.x` is changed.
     println!("cargo:rerun-if-changed=memory.x");
+
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
 }
diff --git a/examples/stm32l1/.cargo/config.toml b/examples/stm32l1/.cargo/config.toml
index e0d2bddf..04985720 100644
--- a/examples/stm32l1/.cargo/config.toml
+++ b/examples/stm32l1/.cargo/config.toml
@@ -2,17 +2,5 @@
 # replace your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip STM32L151CBxxA"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv7m-none-eabi"
diff --git a/examples/stm32l1/build.rs b/examples/stm32l1/build.rs
index d534cc3d..30691aa9 100644
--- a/examples/stm32l1/build.rs
+++ b/examples/stm32l1/build.rs
@@ -28,4 +28,8 @@ fn main() {
     // here, we ensure the build script is only re-run when
     // `memory.x` is changed.
     println!("cargo:rerun-if-changed=memory.x");
+
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
 }
diff --git a/examples/stm32l4/.cargo/config.toml b/examples/stm32l4/.cargo/config.toml
index d32ca4ae..12e77db5 100644
--- a/examples/stm32l4/.cargo/config.toml
+++ b/examples/stm32l4/.cargo/config.toml
@@ -4,17 +4,5 @@
 #runner = "probe-run --chip STM32L475VG"
 runner = "probe-run --chip STM32L4S5VI"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv7em-none-eabi"
diff --git a/examples/stm32l4/build.rs b/examples/stm32l4/build.rs
index d534cc3d..30691aa9 100644
--- a/examples/stm32l4/build.rs
+++ b/examples/stm32l4/build.rs
@@ -28,4 +28,8 @@ fn main() {
     // here, we ensure the build script is only re-run when
     // `memory.x` is changed.
     println!("cargo:rerun-if-changed=memory.x");
+
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
 }
diff --git a/examples/stm32u5/.cargo/config.toml b/examples/stm32u5/.cargo/config.toml
index 7f488700..ba3ef1dc 100644
--- a/examples/stm32u5/.cargo/config.toml
+++ b/examples/stm32u5/.cargo/config.toml
@@ -2,17 +2,5 @@
 # replace STM32F429ZITx with your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip STM32U585AIIx"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv7em-none-eabi"
diff --git a/examples/stm32u5/build.rs b/examples/stm32u5/build.rs
new file mode 100644
index 00000000..8cd32d7e
--- /dev/null
+++ b/examples/stm32u5/build.rs
@@ -0,0 +1,5 @@
+fn main() {
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+}
diff --git a/examples/stm32wb55/.cargo/config.toml b/examples/stm32wb55/.cargo/config.toml
index b535b66d..509517a2 100644
--- a/examples/stm32wb55/.cargo/config.toml
+++ b/examples/stm32wb55/.cargo/config.toml
@@ -2,17 +2,5 @@
 # replace STM32WB55CCUx with your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip STM32WB55CCUx --speed 1000 --connect-under-reset"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv7em-none-eabihf"
diff --git a/examples/stm32wb55/build.rs b/examples/stm32wb55/build.rs
index d534cc3d..30691aa9 100644
--- a/examples/stm32wb55/build.rs
+++ b/examples/stm32wb55/build.rs
@@ -28,4 +28,8 @@ fn main() {
     // here, we ensure the build script is only re-run when
     // `memory.x` is changed.
     println!("cargo:rerun-if-changed=memory.x");
+
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
 }
diff --git a/examples/stm32wl55/.cargo/config.toml b/examples/stm32wl55/.cargo/config.toml
index 255f399f..60076e06 100644
--- a/examples/stm32wl55/.cargo/config.toml
+++ b/examples/stm32wl55/.cargo/config.toml
@@ -1,21 +1,6 @@
-[unstable]
-build-std = ["core"]
-
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
 # replace your chip as listed in `probe-run --list-chips`
 runner = "probe-run --chip STM32WLE5JCIx"
 
-rustflags = [
-  # LLD (shipped with the Rust toolchain) is used as the default linker
-  "-C", "link-arg=--nmagic",
-  "-C", "link-arg=-Tlink.x",
-  "-C", "link-arg=-Tdefmt.x",
-
-  # Code-size optimizations.
-  "-Z", "trap-unreachable=no",
-  "-C", "inline-threshold=5",
-  "-C", "no-vectorize-loops",
-]
-
 [build]
 target = "thumbv7em-none-eabihf"
diff --git a/examples/stm32wl55/build.rs b/examples/stm32wl55/build.rs
new file mode 100644
index 00000000..8cd32d7e
--- /dev/null
+++ b/examples/stm32wl55/build.rs
@@ -0,0 +1,5 @@
+fn main() {
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+}
diff --git a/examples/stm32wl55/memory.x b/examples/stm32wl55/memory.x
deleted file mode 100644
index e8b2737f..00000000
--- a/examples/stm32wl55/memory.x
+++ /dev/null
@@ -1,5 +0,0 @@
-MEMORY
-{
-  FLASH : ORIGIN = 0x08000000, LENGTH = 256K
-  RAM : ORIGIN = 0x20000000, LENGTH = 64K
-}