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Move one more method out of macros

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This commit is contained in:
Daniel Berlin 2023-09-30 12:16:47 -04:00
parent 74eb519810
commit dc4c27aead
1 changed files with 17 additions and 19 deletions
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36
embassy-stm32/src/timer/mod.rs
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@ -88,7 +88,23 @@ pub(crate) mod sealed {
pub trait GeneralPurpose32bitInstance: GeneralPurpose16bitInstance { pub trait GeneralPurpose32bitInstance: GeneralPurpose16bitInstance {
fn regs_gp32() -> crate::pac::timer::TimGp32; fn regs_gp32() -> crate::pac::timer::TimGp32;
fn set_frequency(&mut self, frequency: Hertz); fn set_frequency(&mut self, frequency: Hertz) {
use core::convert::TryInto;
let f = frequency.0;
assert!(f > 0);
let timer_f = Self::frequency().0;
let pclk_ticks_per_timer_period = (timer_f / f) as u64;
let psc: u16 = unwrap!(((pclk_ticks_per_timer_period - 1) / (1 << 32)).try_into());
let arr: u32 = unwrap!(((pclk_ticks_per_timer_period / (psc as u64 + 1)).try_into()));
let regs = Self::regs_gp32();
regs.psc().write(|r| r.set_psc(psc));
regs.arr().write(|r| r.set_arr(arr));
regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY));
regs.egr().write(|r| r.set_ug(true));
regs.cr1().modify(|r| r.set_urs(vals::Urs::ANYEVENT));
}
} }
pub trait AdvancedControlInstance: GeneralPurpose16bitInstance { pub trait AdvancedControlInstance: GeneralPurpose16bitInstance {
@ -352,24 +368,6 @@ macro_rules! impl_32bit_timer {
fn regs_gp32() -> crate::pac::timer::TimGp32 { fn regs_gp32() -> crate::pac::timer::TimGp32 {
crate::pac::$inst crate::pac::$inst
} }
fn set_frequency(&mut self, frequency: Hertz) {
use core::convert::TryInto;
let f = frequency.0;
assert!(f > 0);
let timer_f = Self::frequency().0;
let pclk_ticks_per_timer_period = (timer_f / f) as u64;
let psc: u16 = unwrap!(((pclk_ticks_per_timer_period - 1) / (1 << 32)).try_into());
let arr: u32 = unwrap!(((pclk_ticks_per_timer_period / (psc as u64 + 1)).try_into()));
let regs = Self::regs_gp32();
regs.psc().write(|r| r.set_psc(psc));
regs.arr().write(|r| r.set_arr(arr));
regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY));
regs.egr().write(|r| r.set_ug(true));
regs.cr1().modify(|r| r.set_urs(vals::Urs::ANYEVENT));
}
} }
}; };
} }