Merge pull request #1784 from sgoll/check-rcc-before-apply
stm32f2: Check RCC settings before applying
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commit
dd5a886830
@ -378,22 +378,6 @@ pub(crate) unsafe fn init(config: Config) {
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// Reference: STM32F215xx/217xx datasheet Table 13. General operating conditions
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assert!(ahb_freq <= Hertz(120_000_000));
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let flash_ws = unwrap!(config.voltage.wait_states(ahb_freq));
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FLASH.acr().modify(|w| w.set_latency(flash_ws));
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RCC.cfgr().modify(|w| {
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w.set_sw(sw.into());
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w.set_hpre(config.ahb_pre.into());
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w.set_ppre1(config.apb1_pre.into());
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w.set_ppre2(config.apb2_pre.into());
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});
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while RCC.cfgr().read().sws().to_bits() != sw.to_bits() {}
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// Turn off HSI to save power if we don't need it
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if !config.hsi {
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RCC.cr().modify(|w| w.set_hsion(false));
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}
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let (apb1_freq, apb1_tim_freq) = match config.apb1_pre {
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APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
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pre => {
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@ -414,6 +398,22 @@ pub(crate) unsafe fn init(config: Config) {
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// Reference: STM32F215xx/217xx datasheet Table 13. General operating conditions
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assert!(apb2_freq <= Hertz(60_000_000));
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let flash_ws = unwrap!(config.voltage.wait_states(ahb_freq));
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FLASH.acr().modify(|w| w.set_latency(flash_ws));
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RCC.cfgr().modify(|w| {
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w.set_sw(sw.into());
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w.set_hpre(config.ahb_pre.into());
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w.set_ppre1(config.apb1_pre.into());
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w.set_ppre2(config.apb2_pre.into());
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});
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while RCC.cfgr().read().sws().to_bits() != sw.to_bits() {}
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// Turn off HSI to save power if we don't need it
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if !config.hsi {
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RCC.cr().modify(|w| w.set_hsion(false));
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}
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set_freqs(Clocks {
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sys: sys_clk,
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ahb1: ahb_freq,
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