From dd62bb16e541dae3ed6471d170f6de68a2a03252 Mon Sep 17 00:00:00 2001
From: Peter Hansen <peter@engcorp.com>
Date: Sun, 3 Dec 2023 13:47:26 -0500
Subject: [PATCH] minimum build code for new APPROTECT is chip type-specific

---
 embassy-nrf/src/chips/nrf52805.rs | 1 +
 embassy-nrf/src/chips/nrf52810.rs | 1 +
 embassy-nrf/src/chips/nrf52811.rs | 1 +
 embassy-nrf/src/chips/nrf52820.rs | 1 +
 embassy-nrf/src/chips/nrf52832.rs | 1 +
 embassy-nrf/src/chips/nrf52833.rs | 1 +
 embassy-nrf/src/chips/nrf52840.rs | 1 +
 embassy-nrf/src/lib.rs            | 5 +++--
 8 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/embassy-nrf/src/chips/nrf52805.rs b/embassy-nrf/src/chips/nrf52805.rs
index 70e4b486..624d6613 100644
--- a/embassy-nrf/src/chips/nrf52805.rs
+++ b/embassy-nrf/src/chips/nrf52805.rs
@@ -7,6 +7,7 @@ pub const FORCE_COPY_BUFFER_SIZE: usize = 256;
 pub const FLASH_SIZE: usize = 192 * 1024;
 
 pub const RESET_PIN: u32 = 21;
+pub const APPROTECT_MIN_BUILD_CODE: u8 = b'B';
 
 embassy_hal_internal::peripherals! {
     // RTC
diff --git a/embassy-nrf/src/chips/nrf52810.rs b/embassy-nrf/src/chips/nrf52810.rs
index 7416d391..002feab3 100644
--- a/embassy-nrf/src/chips/nrf52810.rs
+++ b/embassy-nrf/src/chips/nrf52810.rs
@@ -7,6 +7,7 @@ pub const FORCE_COPY_BUFFER_SIZE: usize = 256;
 pub const FLASH_SIZE: usize = 192 * 1024;
 
 pub const RESET_PIN: u32 = 21;
+pub const APPROTECT_MIN_BUILD_CODE: u8 = b'E';
 
 embassy_hal_internal::peripherals! {
     // RTC
diff --git a/embassy-nrf/src/chips/nrf52811.rs b/embassy-nrf/src/chips/nrf52811.rs
index 58801068..5952907f 100644
--- a/embassy-nrf/src/chips/nrf52811.rs
+++ b/embassy-nrf/src/chips/nrf52811.rs
@@ -7,6 +7,7 @@ pub const FORCE_COPY_BUFFER_SIZE: usize = 256;
 pub const FLASH_SIZE: usize = 192 * 1024;
 
 pub const RESET_PIN: u32 = 21;
+pub const APPROTECT_MIN_BUILD_CODE: u8 = b'B';
 
 embassy_hal_internal::peripherals! {
     // RTC
diff --git a/embassy-nrf/src/chips/nrf52820.rs b/embassy-nrf/src/chips/nrf52820.rs
index 85184d48..c2f792cb 100644
--- a/embassy-nrf/src/chips/nrf52820.rs
+++ b/embassy-nrf/src/chips/nrf52820.rs
@@ -7,6 +7,7 @@ pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
 pub const FLASH_SIZE: usize = 256 * 1024;
 
 pub const RESET_PIN: u32 = 18;
+pub const APPROTECT_MIN_BUILD_CODE: u8 = b'D';
 
 embassy_hal_internal::peripherals! {
     // USB
diff --git a/embassy-nrf/src/chips/nrf52832.rs b/embassy-nrf/src/chips/nrf52832.rs
index ae39628d..65d52364 100644
--- a/embassy-nrf/src/chips/nrf52832.rs
+++ b/embassy-nrf/src/chips/nrf52832.rs
@@ -11,6 +11,7 @@ pub const FORCE_COPY_BUFFER_SIZE: usize = 255;
 pub const FLASH_SIZE: usize = 512 * 1024;
 
 pub const RESET_PIN: u32 = 21;
+pub const APPROTECT_MIN_BUILD_CODE: u8 = b'G';
 
 embassy_hal_internal::peripherals! {
     // RTC
diff --git a/embassy-nrf/src/chips/nrf52833.rs b/embassy-nrf/src/chips/nrf52833.rs
index 342ae8b1..7c9b66d6 100644
--- a/embassy-nrf/src/chips/nrf52833.rs
+++ b/embassy-nrf/src/chips/nrf52833.rs
@@ -7,6 +7,7 @@ pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
 pub const FLASH_SIZE: usize = 512 * 1024;
 
 pub const RESET_PIN: u32 = 18;
+pub const APPROTECT_MIN_BUILD_CODE: u8 = b'B';
 
 embassy_hal_internal::peripherals! {
     // USB
diff --git a/embassy-nrf/src/chips/nrf52840.rs b/embassy-nrf/src/chips/nrf52840.rs
index a5cbd798..51c55cd4 100644
--- a/embassy-nrf/src/chips/nrf52840.rs
+++ b/embassy-nrf/src/chips/nrf52840.rs
@@ -7,6 +7,7 @@ pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
 pub const FLASH_SIZE: usize = 1024 * 1024;
 
 pub const RESET_PIN: u32 = 18;
+pub const APPROTECT_MIN_BUILD_CODE: u8 = b'F';
 
 embassy_hal_internal::peripherals! {
     // USB
diff --git a/embassy-nrf/src/lib.rs b/embassy-nrf/src/lib.rs
index ed8aad89..3274dafb 100644
--- a/embassy-nrf/src/lib.rs
+++ b/embassy-nrf/src/lib.rs
@@ -349,10 +349,11 @@ pub fn init(config: config::Config) -> Peripherals {
                 // Get the letter for the build code (b'A' .. b'F')
                 let build_code = (variant >> 8) as u8;
 
-                if build_code >= b'F' {
-                    // Chips with build code F and higher (revision 3 and higher) have an
+                if build_code >= chip::APPROTECT_MIN_BUILD_CODE {
+                    // Chips with a certain chip type-specific build code or higher have an
                     // improved APPROTECT ("hardware and software controlled access port protection")
                     // which needs explicit action by the firmware to keep it unlocked
+                    // See https://devzone.nordicsemi.com/nordic/nordic-blog/b/blog/posts/working-with-the-nrf52-series-improved-approtect
 
                     // UICR.APPROTECT = SwDisabled
                     let res = uicr_write(consts::UICR_APPROTECT, consts::APPROTECT_DISABLED);