Merge pull request #1073 from embassy-rs/revert-riscv-race
fix: revert race condition introduced for riscv
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commit
de95ab264d
@ -56,10 +56,18 @@ impl Executor {
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self.inner.poll();
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self.inner.poll();
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// we do not care about race conditions between the load and store operations, interrupts
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// we do not care about race conditions between the load and store operations, interrupts
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//will only set this value to true.
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//will only set this value to true.
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critical_section::with(|_| {
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// if there is work to do, loop back to polling
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// if there is work to do, loop back to polling
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if !SIGNAL_WORK_THREAD_MODE.fetch_and(false, Ordering::SeqCst) {
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// TODO can we relax this?
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if SIGNAL_WORK_THREAD_MODE.load(Ordering::SeqCst) {
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SIGNAL_WORK_THREAD_MODE.store(false, Ordering::SeqCst);
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}
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// if not, wait for interrupt
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else {
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core::arch::asm!("wfi");
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core::arch::asm!("wfi");
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}
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}
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});
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// if an interrupt occurred while waiting, it will be serviced here
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}
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}
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}
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}
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}
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}
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