Don't increment read address in DMA copy from peripherals

This commit is contained in:
Mathias 2022-08-18 21:14:57 +02:00
parent 1d49b3444f
commit debff0980d
2 changed files with 16 additions and 10 deletions

View File

@ -10,7 +10,11 @@ use pac::dma::vals::DataSize;
use crate::pac::dma::vals; use crate::pac::dma::vals;
use crate::{pac, peripherals}; use crate::{pac, peripherals};
pub(crate) fn read<'a, C: Channel, W: Word>(ch: impl Peripheral<P = C> + 'a, from: *const W, to: *mut [W]) -> Transfer<'a, C> { pub(crate) fn read<'a, C: Channel, W: Word>(
ch: impl Peripheral<P = C> + 'a,
from: *const W,
to: *mut [W],
) -> Transfer<'a, C> {
let (ptr, len) = crate::dma::slice_ptr_parts_mut(to); let (ptr, len) = crate::dma::slice_ptr_parts_mut(to);
copy(ch, from as *const u32, ptr as *mut u32, len, W::size()) copy(ch, from as *const u32, ptr as *mut u32, len, W::size())
} }
@ -44,7 +48,7 @@ fn copy<'a, C: Channel>(
p.ctrl_trig().write(|w| { p.ctrl_trig().write(|w| {
w.set_data_size(data_size); w.set_data_size(data_size);
w.set_incr_read(true); w.set_incr_read(false);
w.set_incr_write(true); w.set_incr_write(true);
w.set_chain_to(ch.number()); w.set_chain_to(ch.number());
w.set_en(true); w.set_en(true);
@ -136,7 +140,9 @@ pub trait Channel: Peripheral<P = Self> + sealed::Channel + Into<AnyChannel> + S
STATE.channels[self.number() as usize].waker.register(waker); STATE.channels[self.number() as usize].waker.register(waker);
} }
fn on_irq() {} fn on_irq() {
// FIXME:
}
fn degrade(self) -> AnyChannel { fn degrade(self) -> AnyChannel {
AnyChannel { number: self.number() } AnyChannel { number: self.number() }

View File

@ -441,15 +441,15 @@ mod eh1 {
} }
} }
impl<'d, T: Instance> embedded_hal_1::serial::ErrorType for Uart<'d, T> { impl<'d, T: Instance, M: Mode> embedded_hal_1::serial::ErrorType for Uart<'d, T, M> {
type Error = Error; type Error = Error;
} }
impl<'d, T: Instance> embedded_hal_1::serial::ErrorType for UartTx<'d, T> { impl<'d, T: Instance, M: Mode> embedded_hal_1::serial::ErrorType for UartTx<'d, T, M> {
type Error = Error; type Error = Error;
} }
impl<'d, T: Instance> embedded_hal_1::serial::ErrorType for UartRx<'d, T> { impl<'d, T: Instance, M: Mode> embedded_hal_1::serial::ErrorType for UartRx<'d, T, M> {
type Error = Error; type Error = Error;
} }
} }
@ -458,7 +458,7 @@ cfg_if::cfg_if! {
if #[cfg(all(feature = "unstable-traits", feature = "nightly", feature = "_todo_embedded_hal_serial"))] { if #[cfg(all(feature = "unstable-traits", feature = "nightly", feature = "_todo_embedded_hal_serial"))] {
use core::future::Future; use core::future::Future;
impl<'d, T: Instance> embedded_hal_async::serial::Write for UartTx<'d, T> impl<'d, T: Instance, M: Mode> embedded_hal_async::serial::Write for UartTx<'d, T, M>
{ {
type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
@ -473,7 +473,7 @@ cfg_if::cfg_if! {
} }
} }
impl<'d, T: Instance> embedded_hal_async::serial::Read for UartRx<'d, T> impl<'d, T: Instance, M: Mode> embedded_hal_async::serial::Read for UartRx<'d, T, M>
{ {
type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
@ -482,7 +482,7 @@ cfg_if::cfg_if! {
} }
} }
impl<'d, T: Instance> embedded_hal_async::serial::Write for Uart<'d, T> impl<'d, T: Instance, M: Mode> embedded_hal_async::serial::Write for Uart<'d, T, M>
{ {
type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
@ -497,7 +497,7 @@ cfg_if::cfg_if! {
} }
} }
impl<'d, T: Instance> embedded_hal_async::serial::Read for Uart<'d, T> impl<'d, T: Instance, M: Mode> embedded_hal_async::serial::Read for Uart<'d, T, M>
{ {
type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;