nrf/uarte: update to new api
This commit is contained in:
Dario Nieuwenhuis
parent
7b6086d19e
commit
df42c38492
@ -12,38 +12,26 @@ use cortex_m_rt::entry;
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use defmt::panic;
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use embassy::executor::{task, Executor};
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use embassy::time::{Duration, Timer};
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use embassy::traits::uart::Uart;
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use embassy::traits::uart::{Read, Write};
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use embassy::util::Forever;
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use embassy_nrf::{interrupt, pac, rtc, uarte};
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use embassy_nrf::{interrupt, pac, rtc, uarte, Peripherals};
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use futures::future::{select, Either};
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use futures::pin_mut;
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use nrf52840_hal::clocks;
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use nrf52840_hal::gpio;
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#[task]
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async fn run(uart: pac::UARTE0, port: pac::P0) {
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// Init UART
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let port0 = gpio::p0::Parts::new(port);
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async fn run() {
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let p = Peripherals::take().unwrap();
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let pins = uarte::Pins {
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rxd: port0.p0_08.into_floating_input().degrade(),
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txd: port0
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.p0_06
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.into_push_pull_output(gpio::Level::Low)
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.degrade(),
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cts: None,
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rts: None,
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};
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let mut config = uarte::Config::default();
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config.parity = uarte::Parity::EXCLUDED;
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config.baudrate = uarte::Baudrate::BAUD115200;
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// NOTE(unsafe): Safe becasue we do not use `mem::forget` anywhere.
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let mut uart = unsafe {
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uarte::Uarte::new(
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uart,
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interrupt::take!(UARTE0_UART0),
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pins,
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uarte::Parity::EXCLUDED,
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uarte::Baudrate::BAUD115200,
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)
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};
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let irq = interrupt::take!(UARTE0_UART0);
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let uart =
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unsafe { uarte::Uarte::new(p.uarte0, irq, p.p0_08, p.p0_06, p.p0_07, p.p0_05, config) };
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pin_mut!(uart);
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info!("uarte initialized!");
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@ -51,19 +39,22 @@ async fn run(uart: pac::UARTE0, port: pac::P0) {
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let mut buf = [0; 8];
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buf.copy_from_slice(b"Hello!\r\n");
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unwrap!(uart.send(&buf).await);
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unwrap!(uart.as_mut().write(&buf).await);
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info!("wrote hello in uart!");
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loop {
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let buf_len = buf.len();
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info!("reading...");
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unwrap!(uart.as_mut().read(&mut buf).await);
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info!("writing...");
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unwrap!(uart.as_mut().write(&buf).await);
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/*
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// `receive()` doesn't return until the buffer has been completely filled with
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// incoming data, which in this case is 8 bytes.
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//
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// This example shows how to use `select` to run an uart receive concurrently with a
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// 1 second timer, effectively adding a timeout to the receive operation.
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let recv_fut = uart.receive(&mut buf);
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let recv_fut = uart.read(&mut buf);
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let timer_fut = Timer::after(Duration::from_millis(1000));
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let received_len = match select(recv_fut, timer_fut).await {
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// recv_fut completed first, so we've received `buf_len` bytes.
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@ -81,8 +72,9 @@ async fn run(uart: pac::UARTE0, port: pac::P0) {
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info!("read done, got {}", received);
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// Echo back received data
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unwrap!(uart.send(received).await);
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unwrap!(uart.write(received).await);
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}
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*/
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}
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}
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@ -110,9 +102,7 @@ fn main() -> ! {
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let executor = EXECUTOR.put(Executor::new());
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executor.set_alarm(alarm);
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let uarte0 = p.UARTE0;
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let p0 = p.P0;
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executor.run(|spawner| {
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unwrap!(spawner.spawn(run(uarte0, p0)));
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unwrap!(spawner.spawn(run()));
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});
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}
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@ -5,43 +5,49 @@
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//! are dropped correctly (e.g. not using `mem::forget()`).
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use core::future::Future;
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use core::ops::Deref;
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use core::marker::PhantomData;
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use core::pin::Pin;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::{Context, Poll};
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use embassy::interrupt::InterruptExt;
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use embassy::util::Signal;
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use core::task::Poll;
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use embassy::traits::uart::{Error, Read, Write};
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use embassy::util::{wake_on_interrupt, OnDrop, PeripheralBorrow, Signal};
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use embassy_extras::unborrow;
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use futures::future::poll_fn;
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use crate::fmt::{assert, *};
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use crate::gpio::Pin as GpioPin;
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use crate::hal::pac;
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use crate::hal::prelude::*;
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use crate::hal::target_constants::EASY_DMA_SIZE;
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use crate::interrupt;
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use crate::interrupt::Interrupt;
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use crate::peripherals;
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pub use crate::hal::uarte::Pins;
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// Re-export SVD variants to allow user to directly set values.
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pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
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#[non_exhaustive]
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pub struct Config {
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pub parity: Parity,
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pub baudrate: Baudrate,
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}
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impl Default for Config {
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fn default() -> Self {
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Self {
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parity: Parity::EXCLUDED,
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baudrate: Baudrate::BAUD115200,
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}
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}
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}
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/// Interface to the UARTE peripheral
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pub struct Uarte<T>
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where
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T: Instance,
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{
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instance: T,
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pub struct Uarte<'d, T: Instance> {
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peri: T,
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irq: T::Interrupt,
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pins: Pins,
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phantom: PhantomData<&'d mut T>,
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}
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pub struct State {
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tx_done: Signal<()>,
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rx_done: Signal<u32>,
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}
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impl<T> Uarte<T>
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where
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T: Instance,
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{
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impl<'d, T: Instance> Uarte<'d, T> {
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/// Creates the interface to a UARTE instance.
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/// Sets the baud rate, parity and assigns the pins to the UARTE peripheral.
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///
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@ -52,85 +58,48 @@ where
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/// or [`receive`](Uarte::receive).
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#[allow(unused_unsafe)]
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pub unsafe fn new(
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uarte: T,
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irq: T::Interrupt,
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mut pins: Pins,
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parity: Parity,
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baudrate: Baudrate,
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uarte: impl PeripheralBorrow<Target = T> + 'd,
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irq: impl PeripheralBorrow<Target = T::Interrupt> + 'd,
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rxd: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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txd: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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cts: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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rts: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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config: Config,
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) -> Self {
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assert!(uarte.enable.read().enable().is_disabled());
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unborrow!(uarte, irq, rxd, txd, cts, rts);
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uarte.psel.rxd.write(|w| {
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unsafe { w.bits(pins.rxd.psel_bits()) };
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w.connect().connected()
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});
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let r = uarte.regs();
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pins.txd.set_high().unwrap();
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uarte.psel.txd.write(|w| {
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unsafe { w.bits(pins.txd.psel_bits()) };
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w.connect().connected()
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});
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assert!(r.enable.read().enable().is_disabled());
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// Optional pins
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uarte.psel.cts.write(|w| {
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if let Some(ref pin) = pins.cts {
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unsafe { w.bits(pin.psel_bits()) };
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w.connect().connected()
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} else {
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w.connect().disconnected()
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}
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});
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// TODO OptionalPin for RTS/CTS.
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uarte.psel.rts.write(|w| {
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if let Some(ref pin) = pins.rts {
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unsafe { w.bits(pin.psel_bits()) };
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w.connect().connected()
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} else {
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w.connect().disconnected()
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}
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});
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txd.set_high();
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rts.set_high();
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rxd.conf().write(|w| w.input().connect().drive().h0h1());
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txd.conf().write(|w| w.dir().output().drive().h0h1());
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//cts.conf().write(|w| w.input().connect().drive().h0h1());
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//rts.conf().write(|w| w.dir().output().drive().h0h1());
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uarte.baudrate.write(|w| w.baudrate().variant(baudrate));
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uarte.config.write(|w| w.parity().variant(parity));
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r.psel.rxd.write(|w| unsafe { w.bits(rxd.psel_bits()) });
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r.psel.txd.write(|w| unsafe { w.bits(txd.psel_bits()) });
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//r.psel.cts.write(|w| unsafe { w.bits(cts.psel_bits()) });
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//r.psel.rts.write(|w| unsafe { w.bits(rts.psel_bits()) });
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// Enable interrupts
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uarte.events_endtx.reset();
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uarte.events_endrx.reset();
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uarte
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.intenset
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.write(|w| w.endtx().set().txstopped().set().endrx().set().rxto().set());
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r.baudrate.write(|w| w.baudrate().variant(config.baudrate));
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r.config.write(|w| w.parity().variant(config.parity));
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// Register ISR
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irq.set_handler(Self::on_irq);
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irq.unpend();
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irq.enable();
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// Enable
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r.enable.write(|w| w.enable().enabled());
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Uarte {
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instance: uarte,
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Self {
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peri: uarte,
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irq,
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pins,
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phantom: PhantomData,
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}
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}
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pub fn free(self) -> (T, T::Interrupt, Pins) {
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// Wait for the peripheral to be disabled from the ISR.
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while self.instance.enable.read().enable().is_enabled() {}
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(self.instance, self.irq, self.pins)
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}
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fn enable(&mut self) {
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trace!("enable");
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self.instance.enable.write(|w| w.enable().enabled());
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}
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fn tx_started(&self) -> bool {
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self.instance.events_txstarted.read().bits() != 0
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}
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fn rx_started(&self) -> bool {
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self.instance.events_rxstarted.read().bits() != 0
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}
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/*
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unsafe fn on_irq(_ctx: *mut ()) {
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let uarte = &*pac::UARTE0::ptr();
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@ -186,54 +155,127 @@ where
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uarte.enable.write(|w| w.enable().disabled());
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}
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}
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*/
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}
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impl<T: Instance> embassy::traits::uart::Uart for Uarte<T> {
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type ReceiveFuture<'a> = ReceiveFuture<'a, T>;
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type SendFuture<'a> = SendFuture<'a, T>;
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impl<'d, T: Instance> Read for Uarte<'d, T> {
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#[rustfmt::skip]
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type ReadFuture<'a> where Self: 'a = impl Future<Output = Result<(), Error>> + 'a;
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/// Sends serial data.
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///
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/// `tx_buffer` is marked as static as per `embedded-dma` requirements.
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/// It it safe to use a buffer with a non static lifetime if memory is not
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/// reused until the future has finished.
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fn send<'a>(&'a mut self, tx_buffer: &'a [u8]) -> SendFuture<'a, T> {
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// Panic if TX is running which can happen if the user has called
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// `mem::forget()` on a previous future after polling it once.
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assert!(!self.tx_started());
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fn read<'a>(self: Pin<&'a mut Self>, rx_buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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async move {
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let this = unsafe { self.get_unchecked_mut() };
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T::state().tx_done.reset();
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let ptr = rx_buffer.as_ptr();
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let len = rx_buffer.len();
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assert!(len <= EASY_DMA_SIZE);
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SendFuture {
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uarte: self,
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buf: tx_buffer,
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}
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let r = this.peri.regs();
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let drop = OnDrop::new(move || {
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info!("read drop: stopping");
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r.intenclr.write(|w| w.endrx().clear());
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r.tasks_stoprx.write(|w| unsafe { w.bits(1) });
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// TX is stopped almost instantly, spinning is fine.
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while r.events_endrx.read().bits() == 0 {}
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info!("read drop: stopped");
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});
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r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) });
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r.events_endrx.reset();
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r.intenset.write(|w| w.endrx().set());
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compiler_fence(Ordering::SeqCst);
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trace!("startrx");
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r.tasks_startrx.write(|w| unsafe { w.bits(1) });
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let irq = &mut this.irq;
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poll_fn(|cx| {
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if r.events_endrx.read().bits() != 0 {
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r.events_endrx.reset();
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return Poll::Ready(());
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}
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/// Receives serial data.
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///
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/// The future is pending until the buffer is completely filled.
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/// A common pattern is to use [`stop()`](ReceiveFuture::stop) to cancel
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/// unfinished transfers after a timeout to prevent lockup when no more data
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/// is incoming.
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///
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/// `rx_buffer` is marked as static as per `embedded-dma` requirements.
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/// It it safe to use a buffer with a non static lifetime if memory is not
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/// reused until the future has finished.
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fn receive<'a>(&'a mut self, rx_buffer: &'a mut [u8]) -> ReceiveFuture<'a, T> {
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// Panic if RX is running which can happen if the user has called
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// `mem::forget()` on a previous future after polling it once.
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assert!(!self.rx_started());
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wake_on_interrupt(irq, cx.waker());
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T::state().rx_done.reset();
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Poll::Pending
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})
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.await;
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ReceiveFuture {
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uarte: self,
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buf: rx_buffer,
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compiler_fence(Ordering::SeqCst);
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r.intenclr.write(|w| w.endrx().clear());
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drop.defuse();
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Ok(())
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}
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}
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}
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impl<'d, T: Instance> Write for Uarte<'d, T> {
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#[rustfmt::skip]
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type WriteFuture<'a> where Self: 'a = impl Future<Output = Result<(), Error>> + 'a;
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fn write<'a>(self: Pin<&'a mut Self>, tx_buffer: &'a [u8]) -> Self::WriteFuture<'a> {
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async move {
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let this = unsafe { self.get_unchecked_mut() };
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let ptr = tx_buffer.as_ptr();
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let len = tx_buffer.len();
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assert!(len <= EASY_DMA_SIZE);
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// TODO: panic if buffer is not in SRAM
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let r = this.peri.regs();
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let drop = OnDrop::new(move || {
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info!("write drop: stopping");
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r.intenclr.write(|w| w.endtx().clear());
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r.tasks_stoptx.write(|w| unsafe { w.bits(1) });
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// TX is stopped almost instantly, spinning is fine.
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while r.events_endtx.read().bits() == 0 {}
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info!("write drop: stopped");
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});
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r.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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r.txd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) });
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r.events_endtx.reset();
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r.intenset.write(|w| w.endtx().set());
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compiler_fence(Ordering::SeqCst);
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trace!("starttx");
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r.tasks_starttx.write(|w| unsafe { w.bits(1) });
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let irq = &mut this.irq;
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poll_fn(|cx| {
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if r.events_endtx.read().bits() != 0 {
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r.events_endtx.reset();
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return Poll::Ready(());
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}
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wake_on_interrupt(irq, cx.waker());
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Poll::Pending
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})
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.await;
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compiler_fence(Ordering::SeqCst);
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r.intenclr.write(|w| w.endtx().clear());
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drop.defuse();
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Ok(())
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}
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}
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}
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/*
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/// Future for the [`Uarte::send()`] method.
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pub struct SendFuture<'a, T>
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where
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@ -252,11 +294,8 @@ where
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trace!("stoptx");
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// Stop the transmitter to minimize the current consumption.
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self.uarte.instance.events_txstarted.reset();
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self.uarte
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.instance
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.tasks_stoptx
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.write(|w| unsafe { w.bits(1) });
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self.uarte.peri.events_txstarted.reset();
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self.uarte.peri.tasks_stoptx.write(|w| unsafe { w.bits(1) });
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// TX is stopped almost instantly, spinning is fine.
|
||||
while !T::state().tx_done.signaled() {}
|
||||
@ -264,46 +303,6 @@ where
|
||||
}
|
||||
}
|
||||
|
||||
impl<'a, T> Future for SendFuture<'a, T>
|
||||
where
|
||||
T: Instance,
|
||||
{
|
||||
type Output = Result<(), embassy::traits::uart::Error>;
|
||||
|
||||
fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
|
||||
let Self { uarte, buf } = unsafe { self.get_unchecked_mut() };
|
||||
|
||||
if T::state().tx_done.poll_wait(cx).is_pending() {
|
||||
let ptr = buf.as_ptr();
|
||||
let len = buf.len();
|
||||
assert!(len <= EASY_DMA_SIZE);
|
||||
// TODO: panic if buffer is not in SRAM
|
||||
|
||||
uarte.enable();
|
||||
|
||||
compiler_fence(Ordering::SeqCst);
|
||||
uarte
|
||||
.instance
|
||||
.txd
|
||||
.ptr
|
||||
.write(|w| unsafe { w.ptr().bits(ptr as u32) });
|
||||
uarte
|
||||
.instance
|
||||
.txd
|
||||
.maxcnt
|
||||
.write(|w| unsafe { w.maxcnt().bits(len as _) });
|
||||
|
||||
trace!("starttx");
|
||||
uarte.instance.tasks_starttx.write(|w| unsafe { w.bits(1) });
|
||||
while !uarte.tx_started() {} // Make sure transmission has started
|
||||
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(Ok(()))
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// Future for the [`Uarte::receive()`] method.
|
||||
pub struct ReceiveFuture<'a, T>
|
||||
where
|
||||
@ -321,11 +320,8 @@ where
|
||||
if self.uarte.rx_started() {
|
||||
trace!("stoprx (drop)");
|
||||
|
||||
self.uarte.instance.events_rxstarted.reset();
|
||||
self.uarte
|
||||
.instance
|
||||
.tasks_stoprx
|
||||
.write(|w| unsafe { w.bits(1) });
|
||||
self.uarte.peri.events_rxstarted.reset();
|
||||
self.uarte.peri.tasks_stoprx.write(|w| unsafe { w.bits(1) });
|
||||
|
||||
embassy_extras::low_power_wait_until(|| T::state().rx_done.signaled())
|
||||
}
|
||||
@ -350,19 +346,11 @@ where
|
||||
uarte.enable();
|
||||
|
||||
compiler_fence(Ordering::SeqCst);
|
||||
uarte
|
||||
.instance
|
||||
.rxd
|
||||
.ptr
|
||||
.write(|w| unsafe { w.ptr().bits(ptr as u32) });
|
||||
uarte
|
||||
.instance
|
||||
.rxd
|
||||
.maxcnt
|
||||
.write(|w| unsafe { w.maxcnt().bits(len as _) });
|
||||
r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
|
||||
r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) });
|
||||
|
||||
trace!("startrx");
|
||||
uarte.instance.tasks_startrx.write(|w| unsafe { w.bits(1) });
|
||||
uarte.peri.tasks_startrx.write(|w| unsafe { w.bits(1) });
|
||||
while !uarte.rx_started() {} // Make sure reception has started
|
||||
|
||||
Poll::Pending
|
||||
@ -383,11 +371,8 @@ where
|
||||
let len = if self.uarte.rx_started() {
|
||||
trace!("stoprx (stop)");
|
||||
|
||||
self.uarte.instance.events_rxstarted.reset();
|
||||
self.uarte
|
||||
.instance
|
||||
.tasks_stoprx
|
||||
.write(|w| unsafe { w.bits(1) });
|
||||
self.uarte.peri.events_rxstarted.reset();
|
||||
self.uarte.peri.tasks_stoprx.write(|w| unsafe { w.bits(1) });
|
||||
T::state().rx_done.wait().await
|
||||
} else {
|
||||
// Transfer was stopped before it even started. No bytes were sent.
|
||||
@ -396,45 +381,33 @@ where
|
||||
len as _
|
||||
}
|
||||
}
|
||||
*/
|
||||
|
||||
mod private {
|
||||
pub trait Sealed {}
|
||||
mod sealed {
|
||||
use super::*;
|
||||
|
||||
pub trait Instance {
|
||||
fn regs(&self) -> &pac::uarte0::RegisterBlock;
|
||||
}
|
||||
}
|
||||
|
||||
pub trait Instance:
|
||||
Deref<Target = pac::uarte0::RegisterBlock> + Sized + private::Sealed + 'static
|
||||
{
|
||||
pub trait Instance: sealed::Instance + 'static {
|
||||
type Interrupt: Interrupt;
|
||||
|
||||
#[doc(hidden)]
|
||||
fn state() -> &'static State;
|
||||
}
|
||||
|
||||
static UARTE0_STATE: State = State {
|
||||
tx_done: Signal::new(),
|
||||
rx_done: Signal::new(),
|
||||
};
|
||||
impl private::Sealed for pac::UARTE0 {}
|
||||
impl Instance for pac::UARTE0 {
|
||||
type Interrupt = interrupt::UARTE0_UART0;
|
||||
|
||||
fn state() -> &'static State {
|
||||
&UARTE0_STATE
|
||||
macro_rules! make_impl {
|
||||
($type:ident, $irq:ident) => {
|
||||
impl sealed::Instance for peripherals::$type {
|
||||
fn regs(&self) -> &pac::uarte0::RegisterBlock {
|
||||
unsafe { &*pac::$type::ptr() }
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
|
||||
static UARTE1_STATE: State = State {
|
||||
tx_done: Signal::new(),
|
||||
rx_done: Signal::new(),
|
||||
};
|
||||
#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
|
||||
impl private::Sealed for pac::UARTE1 {}
|
||||
#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
|
||||
impl Instance for pac::UARTE1 {
|
||||
type Interrupt = interrupt::UARTE1;
|
||||
|
||||
fn state() -> &'static State {
|
||||
&UARTE1_STATE
|
||||
}
|
||||
impl Instance for peripherals::$type {
|
||||
type Interrupt = interrupt::$irq;
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
make_impl!(UARTE0, UARTE0_UART0);
|
||||
#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
|
||||
make_impl!(UARTE1, UARTE1);
|
||||
|
||||
@ -1,4 +1,5 @@
|
||||
use core::future::Future;
|
||||
use core::pin::Pin;
|
||||
|
||||
#[derive(Copy, Clone, Debug, Eq, PartialEq)]
|
||||
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||
@ -7,18 +8,31 @@ pub enum Error {
|
||||
Other,
|
||||
}
|
||||
|
||||
pub trait Uart {
|
||||
type ReceiveFuture<'a>: Future<Output = Result<(), Error>>;
|
||||
type SendFuture<'a>: Future<Output = Result<(), Error>>;
|
||||
/// Receive into the buffer until the buffer is full
|
||||
fn receive<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReceiveFuture<'a>;
|
||||
/// Send the specified buffer, and return when the transmission has completed
|
||||
fn send<'a>(&'a mut self, buf: &'a [u8]) -> Self::SendFuture<'a>;
|
||||
pub trait Read {
|
||||
type ReadFuture<'a>: Future<Output = Result<(), Error>>
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
fn read<'a>(self: Pin<&'a mut Self>, buf: &'a mut [u8]) -> Self::ReadFuture<'a>;
|
||||
}
|
||||
|
||||
pub trait IdleUart {
|
||||
type ReceiveFuture<'a>: Future<Output = Result<usize, Error>>;
|
||||
pub trait ReadUntilIdle {
|
||||
type ReadUntilIdleFuture<'a>: Future<Output = Result<usize, Error>>
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
/// Receive into the buffer until the buffer is full or the line is idle after some bytes are received
|
||||
/// Return the number of bytes received
|
||||
fn receive_until_idle<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReceiveFuture<'a>;
|
||||
fn read_until_idle<'a>(
|
||||
self: Pin<&'a mut Self>,
|
||||
buf: &'a mut [u8],
|
||||
) -> Self::ReadUntilIdleFuture<'a>;
|
||||
}
|
||||
|
||||
pub trait Write {
|
||||
type WriteFuture<'a>: Future<Output = Result<(), Error>>
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
fn write<'a>(self: Pin<&'a mut Self>, buf: &'a [u8]) -> Self::WriteFuture<'a>;
|
||||
}
|
||||
|
||||
@ -2,6 +2,7 @@
|
||||
mod drop_bomb;
|
||||
mod forever;
|
||||
mod mutex;
|
||||
mod on_drop;
|
||||
mod portal;
|
||||
mod signal;
|
||||
|
||||
@ -11,6 +12,7 @@ mod waker;
|
||||
pub use drop_bomb::*;
|
||||
pub use forever::*;
|
||||
pub use mutex::*;
|
||||
pub use on_drop::*;
|
||||
pub use portal::*;
|
||||
pub use signal::*;
|
||||
pub use waker::*;
|
||||
|
||||
24
embassy/src/util/on_drop.rs
Normal file
24
embassy/src/util/on_drop.rs
Normal file
@ -0,0 +1,24 @@
|
||||
use core::mem;
|
||||
use core::mem::MaybeUninit;
|
||||
|
||||
pub struct OnDrop<F: FnOnce()> {
|
||||
f: MaybeUninit<F>,
|
||||
}
|
||||
|
||||
impl<F: FnOnce()> OnDrop<F> {
|
||||
pub fn new(f: F) -> Self {
|
||||
Self {
|
||||
f: MaybeUninit::new(f),
|
||||
}
|
||||
}
|
||||
|
||||
pub fn defuse(self) {
|
||||
mem::forget(self)
|
||||
}
|
||||
}
|
||||
|
||||
impl<F: FnOnce()> Drop for OnDrop<F> {
|
||||
fn drop(&mut self) {
|
||||
unsafe { self.f.as_ptr().read()() }
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user