stm32: centralize enabling pwr, syscfg, flash.
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@ -215,11 +215,6 @@ impl Default for Config {
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}
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pub(crate) unsafe fn init(config: Config) {
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#[cfg(stm32h7)]
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RCC.apb4enr().modify(|w| w.set_syscfgen(true));
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#[cfg(stm32h5)]
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RCC.apb3enr().modify(|w| w.set_sbsen(true));
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// NB. The lower bytes of CR3 can only be written once after
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// POR, and must be written with a valid combination. Refer to
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// RM0433 Rev 7 6.8.4. This is partially enforced by dropping
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