From e18d71dedc566a4aea6fa386299d7161ac39cbc3 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 7 Jan 2021 00:50:40 +0100 Subject: [PATCH] Fix build on nrf52832 --- embassy-nrf/src/buffered_uarte.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index fac3703a..640ec6ad 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs @@ -159,7 +159,7 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi // This gives us the amount of 16M ticks for 20 bits. let timeout = 0x8000_0000 / (baudrate as u32 / 40); - timer.tasks_stop.write(|w| w.tasks_stop().set_bit()); + timer.tasks_stop.write(|w| unsafe { w.bits(1) }); timer.bitmode.write(|w| w.bitmode()._32bit()); timer.prescaler.write(|w| unsafe { w.prescaler().bits(0) }); timer.cc[0].write(|w| unsafe { w.bits(timeout) }); @@ -322,7 +322,7 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi RxState::Receiving => { trace!(" irq_rx: in state receiving"); if self.uarte.events_endrx.read().bits() != 0 { - self.timer.tasks_stop.write(|w| w.tasks_stop().set_bit()); + self.timer.tasks_stop.write(|w| unsafe { w.bits(1) }); let n: usize = self.uarte.rxd.amount.read().amount().bits() as usize; trace!(" irq_rx: endrx {:?}", n);